Vector processing system

Electrical computers and digital processing systems: processing – Processing architecture – Array processor

Reexamination Certificate

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Reexamination Certificate

active

07069417

ABSTRACT:
A vector processing system for executing vector instructions, each instruction defining multiple value pairs, an operation to be executed and a modifier, the vector processing system comprising a plurality of parallel processing units, each arranged to receive one of said pairs of values and, when selected, to implement an operation on said value pair to generate a result, each processing unit comprising at least one flag and being selectable in dependence on a condition defined by said at least one flag, wherein the modifier defines the condition under which the parallel processing unit is individually selected.

REFERENCES:
patent: 5430854 (1995-07-01), Sprague et al.
patent: 6343356 (2002-01-01), Pechanek et al.
patent: 6366999 (2002-04-01), Drabenstott et al.
patent: 6530012 (2003-03-01), Wilson
patent: 6839728 (2005-01-01), Pitsianis et al.
patent: 0 607 988 (1994-07-01), None
patent: 2 201 015 (1988-08-01), None

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