Boots – shoes – and leggings
Patent
1986-07-02
1988-10-25
Zache, Raulfe B.
Boots, shoes, and leggings
G06F 15347
Patent
active
047808110
ABSTRACT:
A vector processing apparatus includes a scalar processor for executing scalar instructions and a vector processor for executing vector instructions. The vector processing apparatus has status code registers (SCR) which can be referred to by both processors through a wait managing circuit. The scalar instructions each have an order assurance instruction to assure an order of execution, and the order assurance instruction and the vector instruction each have a field to designate an SCR. The wait managing circuit renders the execution of the instruction in the scalar processor or the vector processor to wait or enable in accordance with a set status or a reset status of the SCR designated by the instruction field, and sets or resets the SCR designated by the instruction field in response to the completion of execution of the instruction to control synchronization of the execution of instructions in both processors.
REFERENCES:
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patent: 4395757 (1983-07-01), Bievenu et al.
patent: 4541046 (1985-09-01), Nagashima et al.
patent: 4661900 (1987-04-01), Chen et al.
T. Odaka et al., "Hitachi Supercomputer S-810 Array Processor System", Elesevier Science Publishers B.V., 1986.
Briggs et al., Computer Architecture and Parallel Processing, McGraw-Hill, 1984, pp. 8.1, 9.6.
Aoyama Tomoo
Murayama Hiroshi
Hitachi , Ltd.
Hitachi Computer Eng. Co.
Wang Leo Li
Zache Raulfe B.
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