Vector mask operation control unit

Details Vector mask operation control unit Vector mask operation control unit

1986-07-30

1989-07-25

Clark, David L.

Boots, shoes, and leggings

G06F 934

Patent

active

048520497

ABSTRACT:
A vector mask control unit and method of operating same prevents the unnecessary reading or arithmetic operation of operands corresponding to mask inhibitory bits by generating a total address increment value based on the number of consecutive operation-inhibitory bits counted by a counter, the total address increment value being composed of at least one increment value that is multiplied by a power of two. The total address increment value is added to a vector address to obtain an operand address. As a result, the efficient procession of masked vector instructions can be easily achieved.

REFERENCES:
patent: 4179737 (1979-12-01), Kim
patent: 4680730 (1987-07-01), Omoda et al.

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