Vector locked loop

Details Vector locked loop Vector locked loop

1991-08-28

1992-04-14

Pascal, Robert J.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Plural oscillators controlled

331 25, 332145, 332151, 328155, H03L 700

Patent

active

051051680

ABSTRACT:
A vector locked loop is disclosed having a topology somewhat similar to two cross coupled phase locked loops, but wherein both magnitude and phase are used as feedback signals. The output signal is generated by combining the outputs of two VCOs in a combiner network. This output signal is fed back to the input, where phase and magnitude detectors are used to generate error signals. These error signals are processed to yield control signals for controlling the frequencies of the two VCOs. The vector locked loop can be adapted for a number of applications, including frequency translation, modulation (phase, amplitude or arbitrary), and high efficiency linear power amplification.

REFERENCES:
patent: 3778728 (1973-12-01), Schaefer
patent: 4884040 (1989-11-01), Fling
Senderowicz, Daniel, "An NMOS Integrated Vector Lock Loop," Ph.D. Dissertation, University of California, Berkeley, 1982, 148 pages.
Senderowicz et al., "An NMOS Integrated Vector-Locked Loop", U. of C., Berkeley, IEEE International Symposium on Circuits and Systems, 1982, vol. III, pp. 1164-1167.
Say, Sabit, "Vector-Locked Loop Interference Canceller", Ph.D. Dissertation, Polytechnic Institute of New York, 1985, 197 pages.

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