Vector correlation detecting circuit

Image analysis – Image transformation or preprocessing

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36472803, G06F 1715

Patent

active

055486657

ABSTRACT:
A subtracter performs a subtraction (Xi-Yi) per corresponding components of two pairs of N-dimensional vector data (X1, X2, . . . XN), (Y1, Y2, . . . , YN). An exclusive disjunction circuit selects (Xi-Yi) when a result of subtraction is positive, and inverts bits of the result of subtraction to select the bit-inverted data (Xi-Yi) when the result of subtraction is negative. The selection is carried out using a most significant bit of the result of subtraction as a control signal. An accumulator accumulates the selected data and a value of the most significant bit of the result of subtraction. Accordingly only one subtracter suffice. Since the operation of adding 1 to the inverted data of the result of subtraction when the result of subtraction is negative is carried out concurrently with the accumulation of the result of subtraction by the accumulator, a vector correlation detecting circuit with less element and reduced operation time is contemplated.

REFERENCES:
patent: 4924422 (1990-05-01), Vassiliadis et al.
patent: 5046179 (1991-09-01), Uomori et al.
patent: 5329318 (1994-07-01), Keith

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