Vector calculation apparatus capable of rapidly carrying out vec

Details Vector calculation apparatus capable of rapidly carrying out vec Vector calculation apparatus capable of rapidly carrying out vec

1994-03-09

1996-02-20

Mai, Tan V.

Boots, shoes, and leggings

G06F 738

Patent

active

054935210

ABSTRACT:
In a vector calculation apparatus, a vector adder (21) produces an adder output signal (E) by calculating a three-term sum of a first, a second, and a third adder input signal which are produced in accordance with the adder output signal, a predetermined value ("0"), a first vector (A), and a second vector (B) under control of a control circuit (29). A first selecting circuit (26) selects, as a first selected signal, one of the adder output signal and the first vector. A second selecting circuit (27) selects, as a second selected signal, one of the adder output signal and the second vector. A zeroth selecting circuit (24) selects, as a zeroth selected signal, one of the adder output signal and the predetermined value. The vector adder is supplied with the first selected signal as the first adder input signal, with the second selected signal as the second adder input signal, and with the zeroth selected signal as the third adder input signal.

REFERENCES:
patent: 4337519 (1982-06-01), Nishimoto
patent: 4757444 (1988-07-01), Aoyama et al.
patent: 4852040 (1989-07-01), Oota
patent: 4949292 (1990-08-01), Hoshino et al.

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