Vector bit-matrix multiply functional unit

Details Vector bit-matrix multiply functional unit Vector bit-matrix multiply functional unit

1990-11-21

1992-12-08

Nguyen, Long T.

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364754, G06F 752

Patent

active

051703700

ABSTRACT:
A method and apparatus provides bit manipulation of data in vector registers of a vector register computer system. Matrix multiplication is accomplished at a bit level of data stored as two matrices in a vector computer system to produce a matrix result. The matrices may be at least as large as 64 bits by 64 bits and multiplied by another 64 by 64 matrix by means of a vector matrix multiplication functional unit operating on the matrices within a vector processor. The resulting data is also stored at a 64 bit by 64 bit matrix residing in a resultant vector register.

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Passwork User's Guide, by Iobst & Turnbull, Supercomputing Research Center, Jun. 1989.

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