Vddq integrated circuit testing system and method

Details Vddq integrated circuit testing system and method Vddq integrated circuit testing system and method

2002-06-05

2004-02-03

Pert, Evan (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S765010

Reexamination Certificate

active

06686756

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to Integrated Circuit (IC) testing. More specifically, the present invention is concerned with a Vddq IC testing system.
BACKGROUND OF THE INVENTION
Various test strategies and systems have been designed to efficiently test electronic integrated circuits to detect manufacturing defects. One of the test method that is widely used is the so called “Iddq” testing method that is based on the measure of the quiescent power supply current, hence the terminology Iddq, of a CMOS IC. To determine whether the IC passes or fails the test, a measured current value is usually compared to a threshold value.
Generally, a main drawback of Iddq testing is its relatively low frequency of operation, yielding a relatively slow testing procedure.
Furthermore, with emerging submicron technologies and their increased leakage current levels, determining the threshold that separates faulty ICs from good ICs becomes increasingly difficult, which is another major drawback of the conventional Iddq testing method.
From the foregoing, it is therefore apparent that there is still room in the art for improvements in IC testing systems.
OBJECTS OF THE INVENTION
An object of the present invention is therefore to provide an improved IC testing system.
SUMMARY OF THE INVENTION
More specifically, in accordance with an aspect of the present invention, there is provided a system for testing an integrated circuit (IC) having a power supply terminal VDD for defects, the system comprising:
a voltage source having a voltage source output terminal Vaa;
a resistive element connected to the voltage source output terminal Vaa; the resistive element being connectable to the power supply terminal VDD of the IC;
a controllable output voltage source having an output voltage terminal VVS;
a switch element SWA so configured as to selectively connect the output voltage terminal VVS to the power supply terminal VDD;
a differentiator connected to the power supply terminal VDD; the differentiator being so configured as to determine a direction of the voltage variation at the power supply terminal VDD; and
a controller connected to the controllable output voltage source, to the switch element SWA, to the differentiator and to the IC to thereby supply at least one test vector thereto; the controller being so configured as to approximate a voltage value of the power supply terminal VDD and to determine, via the approximated voltage value, if the IC is faulty.
According to another aspect of the present invention, there is provided a system for testing an integrated circuit (IC) having a power supply terminal VDD for defects, the system comprising:
a voltage source having a voltage source output terminal Vaa;
a resistive element connected to the voltage source output terminal Vaa; the resistive element being connectable to the power supply terminal VDD of the IC;
first, second and third controllable output voltage sources having respective output voltage terminals;
first, second and third switch elements so configured as to selectively connect the output voltage terminal of a corresponding controllable output voltage source to the power supply terminal VDD;
a differentiator connected to the power supply terminal VDD; the differentiator being so configured as to determine a direction of a voltage variation at the power supply terminal VDD; and
a controller connected to the controllable output voltage sources, to the switch elements, to the differentiator and to the IC to thereby supply at least one test vector thereto; the controller being so configured as to connect the output voltage terminal of one of the first second and third controllable output voltage sources according to data supplied thereto by the differentiator; the controller being so configured as to approximate a voltage value of the power supply terminal VDD and to determine, via the approximated voltage value, if the IC is faulty.
As will easily be understood by one skilled in the art, the expression “Vddq testing” is to be construed as a test that is based on a quiescent power supply voltage in contrast with “Iddq testing”, which is a test that is based on a quiescent power supply current.
Other objects, advantages and features of the present invention will become more apparent upon reading of the following nonrestrictive description of preferred embodiments thereof, given by way of example only with reference to the accompanying drawings.


REFERENCES:
patent: 6005433 (1999-12-01), Hale
patent: 6593765 (2003-07-01), Ishida et al.
C. Thibeault; “An Histogram Based Procedure for Current Testing of Active Defects”; 1999 IEEE International Test Conference, Sep. 1999; pp. 714-723.
Isawa et al.; “High-Speed IDDQMeasurement Circuit”; 1996 IEEE International Test Conference; pp. 112-117 (no month).
Rochit Rajsuman; “Iddq Testing for CMOS VLSI”; Proceedings of the IEEE; vol. 88, No. 4; Apr. 2000, pp. 544-566.

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