VCO having voltage-to-current converter and PLL using same

Details VCO having voltage-to-current converter and PLL using same VCO having voltage-to-current converter and PLL using same

1992-08-20

1994-04-12

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Plural oscillators controlled

331 14, 331 17, 331 34, 331 57, 331108B, 331177R, H03K 3354, H03L 707, H03L 7099

Patent

active

053029194

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

1. Field of the Invention
The present invention generally relates to phase-locked loops (PLL) used for zone bit recording in hard disk systems, for example, and more particularly to improvement of the voltage-controlled oscillator (VCO) portion of the phase-locked loop.
2. Related Technical Art
Currently, phase-locked loops widely used in magnetic disk devices and other types of data separators comprise a first phase-locked loop operating in synchronization with a data pulse and a second phase-locked loop operating in synchronization with a reference clock, as disclosed in Japanese Laid-Open Patent Publication 59-28209, which was configured to be locked in at a high speed or quickly regardless of whether the data transfer rate changed. This type of phase-locked loop had a configuration as shown in FIG. 4. That is, a first phase-locked loop 10 used a phase comparator (PC) 12 to compare the phases of a data pulse string S.sub.IN and an oscillator output V.sub.1, and outputs a phase difference detection signal, a charge pump 14 that provides current to be charged and discharged to a loop filter 16, acting as a low-pass filter (LPF), in a subsequent stage based on the phase difference detection signal, and a voltage-controlled oscillator (VCO1) 18 in which an oscillation frequency f.sub.OS1 was controlled by a control voltage V.sub.F1, output by loop filter 16. A second phase-locked loop 20 used a phase comparator (PC) 22 to compare the phases of a reference clock CLK and an oscillator output V.sub.2 and output a phase detection signal. A charge pump 24 that provides the current to be charged and discharged to the loop filter 26, acting as a low-pass filter (LPF), in a subsequent stage based on the second phase detection signal, and a voltage-controlled oscillator (VCO2) 28 in which an oscillation frequency f.sub.OS2 was controlled in responce to a control voltage V.sub.F2, output by loop filter 16, were also used. The voltage-controlled oscillators 18 and 28 are each circuits with characteristic constants equal to each other, and each has a control input terminal a and an offset voltage (reference voltage) terminal b. Output V.sub.F1 of loop filter 16 and output V.sub.F2 of loop filter 26 of second phase-locked loop 20 are impressed on control input terminal a and offset voltage (reference voltage) terminal b, respectively, of voltage-controlled oscillator 18 of first phase-locked loop 10. An intermediate voltage V.sub.DD /2 (DC voltage) of a power source voltage V.sub.DD and output V.sub.F2 of loop filter 26 are impressed on control input terminal a and offset voltage terminal b, respectively, of voltage-controlled oscillator 28 of second phase-locked loop 20. Voltage-controlled oscillators 18 and 28 each use, as shown in FIG. 5, a voltage-current converter (V/I) 32 and a current frequency converter (I/F) 34. Voltage-current converter 32 comprises a parallel current path made using a MOS transistor Tr.sub.1 which is current-controlled by the voltage impressed on control input terminal a and a MOS transistor Tr.sub.2 which is current-controlled by the voltage impressed on offset voltage terminal b, a load MOS transistor Tr.sub.3 connected in series with this parallel current path, an output transistor Tr.sub.4, which acts as a current mirror circuit and uses load MOS transistor Tr.sub.3 as its input transistor, and a load MOS transistor Tr.sub.5 connected in series to transistor Tr.sub.4. Current frequency converter (I/F) 34 is a commonly used ring oscillator having three stages of inverters designated here as INV.sub.1 -INV.sub.3.
In only the first phase-locked loop 10, locking occurs when input of a data pulse string starts, and a considerable amount of time is required until control voltage V.sub.F1, output by loop filter 16, reaches approximately V.sub.DD /2, but by adding a reference clock CLK to second phase-locked loop 20 in advance to preset it to a locked condition and supplying output V.sub.F2 of loop filter 26 to offset voltage terminal b of voltage-controlled oscillato

REFERENCES:
patent: 4862015 (1989-08-01), Grandfield
patent: 5036216 (1991-07-01), Hohmann et al.
patent: 5075639 (1991-12-01), Taya

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