VCO bias generator in a phase lock loop

Details VCO bias generator in a phase lock loop VCO bias generator in a phase lock loop

1993-03-01

1994-12-20

Dwyer, James L.

Pulse or digital communications

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331 10, 331 17, H03D 324

Patent

active

053751485

ABSTRACT:
A bias voltage for a VCO is generated by monitoring UP and DOWN control signals from a charge pump and generating first and second output signals upon detecting a predetermined number of consecutive UP pulses or DOWN pulses. The first output signal causes a shift register pre-loaded with a data pattern having one odd logic state to shift one bit location to left, while the second output signal moves the odd logic state one bit location to the right. The bias voltage to the VCO is selected based on the odd logic state bit location. Any variation in VCO output frequency due to intermittent ground bounce is eliminated by requiring a consecutive number of UP pulses or DOWN pulses before moving the VCO bias point.

REFERENCES:
patent: 4667170 (1987-05-01), Lofgren et al.
patent: 4942370 (1990-07-01), Shigemori
patent: 5075640 (1991-12-01), Miyazawa

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