Variable width CCD register with uniform pitch and charge storag

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Charge transfer device

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Details

257219, 257221, 257232, 257240, H01L 29768

Patent

active

056082428

ABSTRACT:
A CCD shift register includes a first gate electrode, a second gate electrode disposed adjacent to and longitudinally spaced from the first gate electrode, and a buried layer having a first dopant impurity concentration. The first gate electrode is disposed over the buried layer so as to define a first buried layer area. The second gate electrode is disposed over the buried layer so as to define a second buried layer area greater than the first buried layer area. In the buried layer, a trench region is formed so as to have a second dopant impurity concentration greater than the first dopant impurity concentration. The first gate electrode is disposed over the trench region so as to define a first trench area. The second gate electrode being disposed over the trench region so as to define a second trench area less than the first trench area. In the CCD shift register, the first buried layer area defines an area for a first charge storage element characterized by a first charge storage capacity, the first charge storage capacity being a function of the first trench area. The second buried layer area defines an area for a second charge storage element characterized by a second charge storage capacity, the second charge storage capacity being a function of the second trench area. The first and second trench areas are dimensioned so that the first charge storage capacity is equal to or greater than the second charge storage capacity. A tapped CCD shift register includes a first CCD shift register segment and a second shift register segment, both the first and second CCD shift register segments being characterized by a pitch length in the longitudinal direction. The first CCD shift register segment includes a sense node, and the second CCD shift register segment includes a beginning shift register charge storage element, both the sense node and the beginning shift register charge storage element being disposed within one pitch length in the longitudinal direction.

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Chen and Tseng, "A High Speed Tapped CCD Photodiode Linear Image Sensor", IEEE Electron Device Letters, vol. EDL-2, No. 10, Oct. 1981.

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