Variable width, at least six-way addition/accumulation...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Reexamination Certificate

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10321573

ABSTRACT:
The present invention relates to a method and system for providing a variable width, at least six-way addition instruction in a processor. The method includes decoding an instruction as a variable width, at least six-way addition instruction, where the variable width, at least six-way addition instruction includes a plurality of operands. The method also includes adding the plurality of operands to obtain a plurality of sums. The method further includes outputting the plurality of sums and optionally storing carry results from the adding operation.

REFERENCES:
patent: 3675001 (1972-07-01), Singh
patent: 5978827 (1999-11-01), Ichikawa
patent: 6122725 (2000-09-01), Roussel et al.
patent: 2003/0159022 (2003-08-01), Kondoh
patent: 2003/0188134 (2003-10-01), Sheaffer

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