Multiplex communications – Wide area network – Packet switching
Patent
1993-10-18
1995-05-02
Kizou, Hassan
Multiplex communications
Wide area network
Packet switching
370 68, 370112, H04Q 1108, H04L 1252
Patent
active
054126576
ABSTRACT:
Disclosed is a circuit which allows an n-bit time slot interchanger (TSI) to process m-bit wide information, where m is some fraction of n. A packing circuit receives the information from the TSI in the form of a series of n-bit segments. The circuit will choose m bits from each segment and produce an n-bit output which includes the m-bit segments in a desired order. The n-bit output can then be looped back to the TSI for insertion into an appropriate time slot.
REFERENCES:
patent: H586 (1989-02-01), Kun
patent: 4547877 (1985-10-01), Lehman et al.
patent: 4718058 (1988-01-01), Van Vuqt
patent: 4821259 (1989-04-01), DeBruler et al.
patent: 5014268 (1991-05-01), Tyrrell et al.
Bottiglieri Michael P.
Brolin Stephen J.
Miragliotta Michael A.
Sarkar Chandan
AT&T Corp.
Birnbaum Lester H.
Kizou Hassan
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