Data processing: measuring – calibrating – or testing – Calibration or correction system – Signal frequency or phase correction
Reexamination Certificate
2005-12-13
2005-12-13
Nghiem, Michael (Department: 2863)
Data processing: measuring, calibrating, or testing
Calibration or correction system
Signal frequency or phase correction
C702S189000
Reexamination Certificate
active
06975950
ABSTRACT:
Methods and apparatus for calibrating one or more signals of an electronic device are provided. Calibration coefficients are stored in a memory, such as a fuse bank, to be applied to correct the one or more signals. A selection multiplexer is provided, the selection multiplexer capable of assigning one of a number of bit weight configurations to the calibration coefficients to set a desired range and resolution for calibration information applied to the one or more signals of the electronic device.
REFERENCES:
patent: 4970514 (1990-11-01), Draxelmayr
patent: 5929796 (1999-07-01), Opris et al.
patent: 6151238 (2000-11-01), Smit et al.
patent: 6720895 (2004-04-01), Poulton et al.
patent: 6748344 (2004-06-01), Mendoza et al.
patent: 6801042 (2004-10-01), Mc Pherson et al.
patent: 6894631 (2005-05-01), Bardsley
“A 15 b 1 Ms/s digitally self-calibrated pipeline ADC”; Karanicolas, A.N.; Lee, H.S.; Bacrania, K.L.;□□Solid-State Circuits Conference, 1993. Digest of Technical Papers. 40th ISSCC., 1993 IEEE International; Feb. 24-26, 1993 Page(s):60-61, 263.
“Monolithic low-power 16 b 1 MSample/s self-calibrating pipeline ADC”; Mayes, M.K.; Chin, S.W.;□□Solid-State Circuits Conference, 1996. Digest of Technical Papers. 43rd ISSCC., 1996 IEEE International; Feb. 8-10, 1996 Page(s):312-313, 465.
“A 200 mW, 1 Msample/s, 16-b pipelined A/D converter with on-chip 32-b microcontroller”; Mayes, M.K.; Sing W. Chin;□□Solid-State Circuits, IEEE Journal of ; vol. 31, Issue 12, Dec. 1996 Page(s):1862-1872.
“A single-ended 12-bit 20 Msample/s self-calibrating pipeline A/D converter”; Opris, I.E.; Lewicki, L.D.; Wong, B.C.;□□Solid-State Circuits, IEEE Journal of; vol. 33, Issue 12, Dec. 1998 Page(s):1898-1903.
“A programmable sensor signal conditioning LSI”; Murabayashi, F.; Matsumoto, M.; Hanzawa, K.; Yamauchi, T.; Sakurai, K.; Yamada, H.; Shimada, S.; Miyazaki, A.; AP-ASIC Proceedings Second IEEE Asia Pacific Conference on; Aug. 28-30, . 2000 Page(s):107-110.
“A digital calibration technique for pipelined analog-to-digital converters”; Furuta, M.; Kawahito, S.; Miyazaki, D.; Instrumentation and Measurement Technology Conference. IMTC/2002. Proceedings of the 19th IEEE; vol. 1, May 21-23, 2002 Page(s):713-717.
“A digital self-calibration method for pipeline A/D converters”; Sumanen, L.; Waltari, M.; Korhonen, T.; Halonen, K.; Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on; vol. 2, May 26-29, 2002 Page(s):II-792-II-795.
Analog Devices Inc.
Nghiem Michael
Washburn Douglas N
Wolf Greenfield & Sacks P.C.
LandOfFree
Variable resolution digital calibration does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Variable resolution digital calibration, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Variable resolution digital calibration will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3466903