Variable resistance memory device having reduced bottom...

Details Variable resistance memory device having reduced bottom... Variable resistance memory device having reduced bottom...

2011-08-02

2011-08-02

Smith, Bradley K (Department: 2894)

Semiconductor device manufacturing: process

Making device or circuit responsive to nonelectrical signal

Responsive to electromagnetic radiation

C438S095000

Reexamination Certificate

active

07989251

ABSTRACT:
A variable resistance memory element and method of forming the same. The memory element includes a substrate supporting a bottom electrode having a small bottom contact area. A variable resistance material is formed over the bottom electrodes such that the variable resistance material has a surface that is in electrical communication with the bottom electrode and a top electrode is formed over the variable resistance material. The small bottom electrode contact area reduces the reset current requirement which in turn reduces the write transistor size for each bit.

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patent: 2006/0209585 (2006-09-01), Tanizaki et al.
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K. Goto et al., “Co Salicide Compatible 2-step Activation Annealing Process for Deca-nano Scaled MOSFETs,” 1999 Symposium on VLSI Technology Digest of Technical Papers, pp. 49-50.

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