Variable rate improvement of disc cache subsystem

Boots – shoes – and leggings

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Details

36424341, 36424343, G06F 1212, G06F 1300

Patent

active

052416666

ABSTRACT:
An improved input/output subsystem allowing data transfers between the input/output subsystem and an input/output controller along a subsystem input/output bus to occur at a data transfer rate established by the transfer rate of the processor bus connected between the input/output controller and the central processing unit. Data is transferred from an electronic memory within the input/output subsystem to data buffers within the input/output controller via a direct memory access.

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