Optical communications – Transmitter – Having particular modulation
Reexamination Certificate
2000-06-15
2004-11-30
Sedighian, M. R. (Department: 2633)
Optical communications
Transmitter
Having particular modulation
C398S183000, C398S202000, C398S214000, C398S198000
Reexamination Certificate
active
06826371
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a communication system and more particularly to a variable rate differential phase shift keying (DPSK) system which includes a continuous transmitter and a multi-rate receiver with a single demodulator.
2. Description of the Prior Art
Fixed rate differential phase shift keying (DPSK) digital communication systems are known to have performance comparable to coherent phase shift keyed systems but without the need for a coherent phase reference in the receiver. In such DPSK digital communication systems, the received signal waveform is demodulated, for example, by splitting the received signal in two parts, adding a time delay to one of the two parts and recombining the two signals. The delayed version of the received signal provides the necessary phase reference. The time delay is typically equal to the period of one data bit. One possible implementation of such a demodulator for optical communications systems employing DPSK signaling is an interferometer, such as a Mach-Zehnder interferometer, with unequal optical paths such that the difference in the optical path delay between the two legs of the interferometer is equal to the time of one bit.
Communication systems using DPSK signaling and capable of operating at multiple data rates are known but are hardware intensive and normally require a separate demodulator for each data rate. Each individual demodulator introduces a differential time delay corresponding to the desired bit time for that data rate. In order to solve this problem, commonly-owned U.S. patent application Ser. No. 09/522,802, filed on Mar. 10, 2000, discloses a variable duty cycle DPSK communication system which operates at multiple data rates. Although the variable duty cycle approach permits the use of a single demodulator, there are other problems with this approach. First, it suffers a power penalty because the received power sent during the first bit time for each block of data can not be demodulated because it lacks a phase reference, thus it is wasted. The wasted power approaches one half of the total transmitted power for data rates with low duty cycles. Also, the increase in the ratio of the peak power to the average transmitted power for such variable duty cycle waveforms increase the dynamic range requirements on many signal path components. Such components must tolerate proportionately higher peak power than would otherwise be required. Thus, there is a need for a DPSK communication system which can operate at multiple data rates which minimizes transmitted power requirements without corresponding performance loss and also minimizes hardware.
SUMMARY OF THE INVENTION
Briefly, the present invention relates to a communication system and more particularly to a variable rate differential phase shift keying (DPSK) communication system with minimal hardware that does not have power or performance penalties associated with known DPSK modulation systems. The DPSK modulation system in accordance with the present invention includes a transmitter which includes a carrier signal source, a phase modulator and a DPSK encoder for modulating a carrier signal. The modulated carrier signals may be amplified, for example, by a rare earth element doped fiber amplifier. The signals are transmitted to a multi-rate receiver through a communication channel, for example, free space. The multi-rate receiver includes a single demodulator, for example, a single optical interferometer, used for multiple integer sub-harmonic data rates, which demodulates the modulated signal. The demodulated signals are detected, for example, by an arrangement of photodiodes, and the detected signals are applied to, for example, a clock and data recovery circuit that is tuned as a function of the data rate, for example, by way of a switched filter circuit. The switched filter circuit includes a plurality of low-pass filters that are selected as a function of the data rate. Since the carrier signal is continuously transmitted, a phase reference is available to demodulate all received power and the peak transmitted power is approximately equal to the average transmitted power even at data rates corresponding to bit times that are large compared to the differential time delay of the demodulator.
REFERENCES:
patent: 3633034 (1972-01-01), Uchida et al.
patent: 3811774 (1974-05-01), Honeycutt et al.
patent: 4703471 (1987-10-01), Fitelson et al.
patent: 5864625 (1999-01-01), Rutledge
patent: 6072812 (2000-06-01), Eng
patent: 6271950 (2001-08-01), Hansen et al.
patent: 6271953 (2001-08-01), Dishman et al.
patent: RE37801 (2002-07-01), Shimada et al.
patent: 6473438 (2002-10-01), Cioffi et al.
Bauch Jeffery S.
Humes Todd E.
Roth James A.
Katten Muchin Zavis & Rosenman
Northrop Grumman Corporation
Paniaguas John S.
Sedighian M. R.
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