Variable rate digital switching system

Multiplex communications – Pathfinding or routing – Through a circuit switch

Reexamination Certificate

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Details

C370S389000

Reexamination Certificate

active

06683872

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a digital switching system, and more particularly to a variable rate digital switching system for switching variable rate data traffic such as video traffic.
2. Related Art Statement
As the known digital switching system, TDM (Time division Multiplexing) switch and an ATM (Asynchronous Transfer Mode) switch are broadly used.
S-switch (Space-switch) is the typical TDM switch. In the S-switch, data for a plurality of calls are being time division multiplexed, and are transmitted in a TDM frame as a unit. The TDM frame is comprised of time slots having a length of about 1 octet, and the TDM frame period is about 125 &mgr;s. In the TDM frame, the numbers of the time slots assigned to each of the calls and those positions are not changed during the establishment of the connection.
FIG. 1
is a schematic view showing a principle of the S switch. The S switch comprises time-division gates provided at cross-points of input lines and output lines arranged in a lattice form, and control memories for controlling the time-division gates. The S switch switches the TDM frames between the input lines and the output lines by switching the time-division gates at a high speed, with a timeslot as a unit, with being multiplexed. Each of the timeslots in the input TDM frame is moved to the timeslot in the output TDM frame on the output line of destination through the time-division gate specified by the control memory. Then, the temporal position of the timeslot is kept so that the temporal position on the input line is identical with the temporal position on the output line. The control memories are provided at every output line and store schedules in which the time-division gates are opened to pass the time slot.
The TDM switch has an advantage that once the connection is setup, a delay assurance and a loss rate assurance can be guaranteed without performing a special control such as a flow control, a vergence control, etc. The TDM switch is now mainly used for a speech communication imposed with a strict delay assurance.
However, the TDM switch has following problems. One problem is that a maximum rate of the TDM bus or a maximum rate of a RAM restricts increasing a capacity of the TDM switch. Furthermore, as the number of input lines increases, an establishment of a synchronization of the input time slots becomes more difficult so that it is difficult to increase the capacity more than some 10 Gbps.
Another problem is that it is difficult to handle deal with multiple rate data traffic, since the TDM switch is means for switching efficiently same rate data traffic, so that the TDM switch cannot operate efficiently when there is traffic having various requiring rates, and thus, it is difficult to handle the multi-rate traffic, that is, delay of the timeslots becomes increased.
Further problem is that it is difficult to handle variable rate data traffic, since in the current TDM switching networks, in order to handle the variable rate traffic, the time slots must be required at maximum rate of the traffic, and thus the transmission efficiency becomes very worse. For example, in addition to the speech traffic, video traffic is imposed with the strict delay assurance, too. An MPEG2 is a typical video coding system. Coding due to the MPEG2 produces usually variable rate traffic.
FIG. 3
is a graph representing a distribution of frame sizes of the MPEG2 stream. Assuming that an average available band of the variable rate traffic is about 1 Mbps and a maximum rate of the same is about 5 Mbps, in the known TDM switching system, the connection must be set to about 5 Mbps as the maximum available band. However, because the average available band is about 1 Mbps, the traffic band of about 4 Mbps becomes wasted.
Cross-point buffer switch is the typical ATM switching system.
FIG. 2
is a schematic view showing a principle of the cross-point buffer switch. The cross-point buffer switch comprises buffers each provided at cross-points between input lines and output lines arranged in a lattice form. Address filters are each followed by the buffers. Output control circuits are each connected to the output lines. In the cross-point buffer switch, data for a plurality of calls are being time division multiplexed, and are transmitted in an ATM cell as a unit. The ATM cell has a length of 53 bytes, and comprises a header having a length of 5 bytes and a payload having a length of 48 bytes. Now, using the buffer B
ij
connected to the input port I
i
and the output port O
j
describes the operation of the cross-point buffer switch. The address filter F
ij
checks the header of the ATM cell inputted from the input line I
i
and stores only the ATM cells destined for the output line O
j
into the buffer B
ij
. When the cells to be sent are being storing in the buffer B
ij
, the buffer B
ij
requests a permission for sending the cells to the output control circuit C
j
. The output control circuit C
j
requires the buffer B
ij
to send the ATM cells in consideration of all requests of buffers related to output line O
j
.
In the known ATM switch, because of the subdivision of the stream into the small ATM cells, an overhead caused by a cell assemble/disassemble and addition of the header becomes very large, and the switching speed becomes unnecessarily high. The known ATM switch also has a drawback that because the header is added to every ATM cell, high speed header processing is required. Moreover, for example, in case the of the video traffic, when one ATM cell is lost, the quality of the picture can be very degraded. Furthermore, because the ATM switch cannot distinguish the types of the data contained in the ATM cells, actively processing is very difficult in the switch level. Therefore, controls in upper layers can be complicated.
SUMMARY OF THE INVENTION
It is an object of the present invention to avoid the problems of the above conventional switching system.
It is an object of the present invention to provide a variable rate digital switching system suitable for handling efficiently the traffic imposed with the strict delay assurance, in particularly the video traffic.
According to the invention, there is provided a variable rate digital switching system comprising steps of:
arranging a plurality of incoming TDM buses and a plurality of sending TDM buses in lattice form;
providing cross-point buffers at cross-points of the incoming buses and the sending buses;
connecting the cross-point buffers belonging to respective sending TDM buses to respective scheduler;
checking frame header of input TDM frames by respective cross-point buffers, thereby buffering only data of time slot of destined and belonged sending bus and transmitting contents of the frame header to the scheduler;
performing the scheduling by the scheduler as for how time slots in the sending TDM frame is allocated in respective cross-point buffers according to the contents of the frame header; and
inputting in turn the buffered data in the own-allocated time slots of the sending TDM frame according to the scheduling by the respective cross-point buffer, and outputting them from the sending TDM bus.
In this way, if the number of the input lines is increased, because the cross-point buffers can absorb slight time lag among the time slots, the capacity can be increased easier than the known TDM switching system.
In the variable rate digital switching system according to the invention, because the frame header contains the information about the positions of the time slots in the TDM frame, in the variable rate traffic, the connection dose not need to be set at the maximum rate. If too large amount of the data is inputted into the switch, a plurality of the TDM time slots can be assigned to transmit. Therefore, the variable rate traffic can be switched efficiently.
According to the invention, there is provided a variable rate digital switching system comprising steps of:
arranging a plurality of incoming TDM buses and a plurality of sending TDM buses in lattice form;
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