Variable pulse width generator including a timer vernier

Details Variable pulse width generator including a timer vernier Variable pulse width generator including a timer vernier

1990-12-03

1992-06-16

LaRoche, Eugene R.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307592, H03K 3017

Patent

active

051226766

ABSTRACT:
A pulse logic circuit comprises a plurality of interconnected stages. Each of the stages includes a relatively large node-charging transistor which, when enabled, forwards charging current to a node from a timing pulse of one of a plurality of phases applied to a load capacitance in series with the node-charging transistor. Such large transistors exhibit significant gate-to-source and gate-to drain distributed capacitances. The response time for charging a selected stage node can be decreased by precharging the gate of the node-charging transistor of a selected stage to enable the transistor prior to the application of a timing pulse, thereby increasing the maximum operating speed of the circuit. Disclosed species of such a pulse logic circuit include time vernier circuits which can be utilized as control circuitry for a liquid crystal television or computer display.

REFERENCES:
patent: 3612975 (1971-10-01), Keefe
patent: 3840814 (1974-10-01), Schiffman
patent: 4429236 (1984-01-01), Nitschke
patent: 4532435 (1985-07-01), Wood
patent: 4742346 (1988-05-01), Gillette et al.
patent: 4766430 (1988-08-01), Gillette et al.
patent: 4959557 (1990-09-01), Miller

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