Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Slope control of leading or trailing edge of rectangular or...
Reexamination Certificate
2000-03-15
2001-12-25
Cunningham, Terry D. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Slope control of leading or trailing edge of rectangular or...
C375S371000, C327S058000
Reexamination Certificate
active
06333654
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This is the first application filed for the present invention.
MICROFICHE APPENDIX
Not applicable.
TECHNICAL FIELD
The present invention relates in general to communications equipment and, in particular, to circuitry for drivers that apply a signal to a communications path.
BACKGROUND OF THE INVENTION
The exponential increase in the demand for high-speed access to the Internet and other telecommunications services has created a significant demand for reliable equipment to provide such services. One of the most important classes of high-speed access communications equipment is digital subscriber line (DSL) equipment, used to offer a number related services collectively referred to as xDSL. The xDSL services include Asynchronous Digital Subscriber Line (ADSL), High Speed Digital Subscriber Line (HDSL), Symmetric Digital Subscriber Line (SDSL), and Very High Speed Digital Subscriber Line (VDSL). The xDSL services are provided using twisted pair copper loops commonly referred to as “subscriber loops”. The xDSL transceivers typically convert a digital signal to be transmitted to an analog signal that is processed and coupled to the subscriber loop by a line driver.
In order to transmit signals at high speed, it is essential that the line driver introduce very little distortion in a signal transmitted on the subscriber loop. This is especially important if a multi-carrier modulation technique such as discrete multi-tone (DMT) modulation is used to transmit the signal. Energy conservation is also becoming increasingly important and it is therefore important that line driver circuitry dissipate as little waste energy as possible.
High efficiency line drivers are known in the art. Applicant's co-assigned and co-pending U.S. patent application Ser. No. 09/209,294 entitled DIGITAL SUBSCRIBER LINE DRIVE ARRANGEMENT WITH SELECTABLE VOLTAGE SUPPLIES was filed on Dec. 11, 1998. That application describes a technique in which a power supply for a DSL line driver is switched when an amplitude of the signal crosses a predefined threshold. Due to an inherent delay between switching on the power supply and an output of a drive voltage, the power supply must be switched on before the signal to be transmitted arrives at an input stage of the line driver. However, if the power supply is switched on too abruptly the switching mechanism may inject noise into the signal at the output of the driver. To avoid this problem, the slew rate of the switching mechanism is decreased. Consequently, the higher voltage supply must be turned on sooner, which results in less power savings because the higher voltage remains on longer.
Most xDSL signals have peaks that are nearly Gausian in their distribution. Consequently, very few peaks are at full scale. Therefore, if power supply switching is based on when an amplitude of the signal crosses a threshold, regardless of the peak amplitude of the signal, surplus power may be dissipated because the higher voltage power supply is kept on longer than required by the peak amplitude of the signal.
There therefore exists a need for a supply voltage control circuit for selecting one of 2N (N≧1) power supplies to supply voltage to a line driver that is more energy efficient than control circuits described in the prior art.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a control circuit in a communications device for selecting a power supply for supplying voltage to a signal driver that is energy efficient and does not introduce switching noise into the signal path.
The invention therefore provides a supply voltage control circuit for determining a variable delay before the selection of a higher power supply to supply voltage to a driver that applies a signal to a communications path. The control circuit comprises a slew start controller for determining when a change in voltage supply to the driver is required, based on a peak amplitude of the signal with respect to a voltage output by the higher power supply.
In a preferred embodiment, the supply voltage control circuit comprises a threshold detector for receiving the signal and determining when the amplitude of the signal crosses at least one predefined threshold. It further comprises the slew start controller that receives output from the threshold detector and a signal encoder. A supply voltage selector selects one of the power supplies based on an output of the threshold detector, after a delay determined by the slew start controller, and a slew rate controller limits rates of change to a supply voltage supplied by the power supply selected by the supply voltage selector.
A preferred embodiment of the slew start controller comprises a signal peak measurement circuit, a delay calculation circuit, and a variable delay circuit. The signal peak measurement circuit comprises a register for storing an instantaneous peak amplitude of an encoder signal while the signal is rising and a peak amplitude of the signal while the signal is falling until the signal crosses a threshold associated with a voltage output by a power supply that supplies a lower voltage. A comparator compares the amplitude of the encoder signal to the peak amplitude stored in the register. A multiplexer outputs the amplitude of the encoder signal while the amplitude of the encoder signal is greater than or equal the amplitude stored in the register, otherwise the multiplexer outputs the peak amplitude stored in the register.
The calculation circuit preferably comprises a first circuit for computing (1−V
pk
), where V
pk
is the instantaneous peak amplitude of the signal, a second circuit for truncating a number of bits of a result of the computation of (1−V
pk
); and a circuit for multiplying the truncated bits times a constant, 1/SLOPE, where SLOPE is a slope of the power supply waveform.
The first and second variable delay circuits determine a time delay before a higher of the power supplies selected by the supply voltage selector is switched on to supply voltage to the driver. The first delay circuit receives P most significant bits of a product output by the delay calculation circuit and the second circuit receives Q least significant bits of the product, the P and Q bits being respectively used to determine the delay. The first delay circuit is clocked at a first clock rate, which is the same as the clock rate applied to the signal encoder, and the second delay circuit is clocked at a clock rate of 2
Q
times faster than the first clock rate.
The voltage control circuit is preferably provided for each of positive and negative amplitudes of the encoder signal, although only one control circuit can be used to control both the positive and negative amplitudes, as will be understood by persons skilled in the art.
In accordance with a further aspect of the invention, there is provided a method of determining a variable delay before the selection of a higher power supply to supply voltage to a driver that applies a signal to a communications path. The method comprises a step of determining when a change in voltage supply to the driver is required by comparing a peak amplitude of the signal with a voltage output by the higher power supply.
The method further comprises a step of switching back from the higher power supply to a lower power supply that supplied the voltage before switching, after a predetermined delay. The delay is preferably determined by a counter that is reset at the time of the switching. The higher power supply is selected when the peak amplitude of the signal exceeds a level that can be supported by the lower power supply. The variable delay is preferably determined by sampling the signal to determine the instantaneous peak amplitude of the signal. The instantaneous peak amplitude is stored in a register. If the signal is rising, the instantaneous peak amplitude of the signal is output to a delay calculation circuit. Otherwise, the peak amplitude is output from the register until the signal falls below a threshold associated with a voltage output by th
Harris G. Kate
Mitchler Dennis W.
Cunningham Terry D.
Nortel Networks Limited
Swabey Ogilvy Renault
Tra Quan
Wood Max R.
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