Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor...
Reexamination Certificate
1999-07-01
2002-04-23
Abraham, Fetsum (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
C257S082000, C257S084000, C257S638000
Reexamination Certificate
active
06376859
ABSTRACT:
BACKGROUND AND SUMMARY OF THE INVENTION
The present invention relates to integrated circuit structures and fabrication methods, and especially to techniques for creating silicon-on-insulator substrates.
Background: Porous Silicon
Porous silicon is formed by anodic oxidation of a silicon wafer in a solution of hydrofluoric acid and a surfactant, such as ethanol. The size of the pores, the porosity, and the thickness of the porous silicon can be controlled; pore size is typically in the range of 10-20 nm, while porosity is typically in the range of 30-70 percent.
Porous silicon has a low dielectric constant and high resistivity, which make it useful for isolation. Since porous silicon has a high surface area for its volume (a few hundred square meters per cubic centimeter), it can be oxidized much more quickly than bulk silicon.
One prior use of porous silicon is in FIPOS—full isolation by porous oxidized silicon, which uses an epitaxial layer grown on a heavily-doped silicon surface. The heavily-doped layer is selectively converted to porous silicon by anodization through holes in the epitaxial layer, then oxidized to form a buried layer of oxide.
Variable Porosity Porous Silicon
The present application discloses varying the porosity throughout a layer of porous silicon. For example, low porosity is advantageous to provide a good surface for epitaxial silicon growth and to provide material strength, while high porosity layers provide better isolation and a reduction of stresses between the porous silicon and the substrate. Variable porosity allows these different requirements to be met by varied regions within the layer.
Advantages of the disclosed methods include the ability to optimize a layer of porous silicon to meet the opposing requirements.
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Joyner Keith A.
Swanson Leland S.
Abraham Fetsum
Brady III W. James
Garner Jacqueline J.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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