Patent
1989-07-03
1992-05-19
Popek, Joseph A.
395600, G06F 300, G06F 704, G06F 1540
Patent
active
051154900
ABSTRACT:
Variable length data stored in a RAM are sequentially read out by designating their addresses. It is detected whether or not the readout data is a code indicating a delimitation of, e.g., a word block, record block, file block, or the like. If it is detected that the readout data is a code indicating a delimitation, an address at that time is latched, thus forming an address table based on the latched address. The address table thus formed is utilized upon retrieval of data in the RAM, thus allowing high-speed data access.
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Hidaka Norihiro
Komuro Junichi
Sato Tetsuya
Casio Computer Co. Ltd.
Popek Joseph A.
Whitfield Michael A.
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