Variable gate bias for a reference transistor in a...

Details Variable gate bias for a reference transistor in a... Variable gate bias for a reference transistor in a...

2005-01-04

2005-01-04

Nguyen, Tan T. (Department: 2818)

Static information storage and retrieval

Floating gate

Particular biasing

C365S189070, C365S189110, C365S210130

Reexamination Certificate

active

06839280

ABSTRACT:
A non-volatile memory (30) comprises nanocrystal memory cells (50, 51, 53). The program and erase threshold voltage of the memory cell transistors (50, 51, 53) increase as a function of the number of program/erase operations. During a read operation, a reference transistor (46) provides a reference current for comparing with a cell current. The reference transistor (46) is made from a process similar to that used to make the memory cell transistors (50, 51, 53), except that the reference transistor (46) does not include nanocrystals. By using a similar process to make both the reference transistor (46) and the memory cell transistors (50, 51, 53), a threshold voltage of the reference transistor (46) will track the threshold voltage shift of the memory cell transistor (50, 51, 53). A read control circuit (42) is provided to bias the gate of the reference transistor (46). The read control circuit (42) senses a drain current of the reference transistor (46) and adjusts the gate bias voltage to maintain the reference current at a substantially constant value relative to the cell current.

REFERENCES:
patent: 5172338 (1992-12-01), Mehrotra
patent: 6407946 (2002-06-01), Maruyama et al.
patent: 6414876 (2002-07-01), Harari
patent: 6590804 (2003-07-01), Perner
patent: 6754123 (2004-06-01), Perner et al.

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