Amplifiers – With semiconductor amplifying device – Including gain control means
Reexamination Certificate
2001-08-29
2002-07-23
Pascal, Robert (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including gain control means
C330S278000
Reexamination Certificate
active
06424222
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to a circuit for controlling gain in low noise amplifiers (LNA's) or in preamplifiers, and more specifically to gain control circuitry for use in LNAs or preamplifiers used in wireless communication systems.
BACKGROUND OF THE RELATED ART
In wireless communication, the incident signal at a terminal unit (e.g. an handset) has various magnitudes, depending on the environment of the radio-wave propagation (including the distance between the terminal and the base station). A strongly radiated signal from a transmitting terminal is helpful to a remote station, but is of less use if the station is nearby. Such a strong signal may impose unwanted spurious signals on foreign terminals near the transmitter, and waste the transmitter's battery. Additionally, the circuit for amplification in a receiving terminal may clip and distort its output signal for a large magnitude input.
In general, the inward and the outward signal in a terminal are amplified by a low-noise amplifier (LNA) in the receiver block and a preamplifier in the transmitter block, respectively. Good linearity must be achieved in order to suppress the distortion in the next stages. To prevent the LNA from clipping its output signal for a large input, the LNA's gain has to be made controllable (the gain being lowered for large input signal). Similarly, the gain of a transmitter's preamplifier must be controlled so as not to waste the battery and also not to overdrive its next stage, the power amplifier.
FIG. 1
shows a related art low noise amplifier that employs current-splitting gain-control techniques. In related art gain-control schemes, the LNA's gain is decreased by reducing the drain bias current (i.e., by decreasing the gate bias voltage) of its subcircuit responsible for the gain, i.e., a differential-amplifier stage. If the magnitude of an input signal exceeds some prescribed level, then the LNA is entirely bypassed so that no amplification occurs. Unfortunately, the reduction of the bias current is accompanied by degradation of linearity caused by an unwanted cutoff of the driving transistor. An abrupt change of LNA's gain inherent in the bypass operation makes it hard to simultaneously achieve good linearity and the desired noise performance. Accordingly, a new approach is desirable to control the gain.
SUMMARY OF THE INVENTION
An object of the invention is to solve at least the above problems and/or disadvantages and to provide at least the advantages described hereinafter.
Another object of the invention is to provide a method and apparatus for controlling gain in a low-noise amplifier or in a transmitter's preamplifier.
Another object of the invention is to provide a low-noise amplifier and method of operating same that reduces or avoids clipping its output signal when receiving a large input signal.
Another object of the invention is to provide a method and apparatus capable of controlling the gain of a transmitter's preamplifier so as not to waste the battery and not to overdrive the next stage (the power amplifier).
In a preferred embodiment of the invention, a variable gain amplifier includes, at least in part, a first transistor having a control electrode, a first electrode, a second electrode and a drain, wherein an input signal is coupled to the control electrode, a first reference voltage is coupled to the first electrode and an output signal is coupled to the second electrode; a load inductor coupled between a second reference voltage and the second electrode of the first transistor; a load capacitor coupled to the second electrode of the first transistor; and a variable resistor coupled in parallel to the load inductor.
In another preferred embodiment of the invention, a multi-frequency amplifier includes, at least in part, a driving transistor having a source, a gate and a drain, wherein an input signal is input by an input terminal coupled to the gate, the source is coupled to a reference voltage source, and an output signal is output by an output terminal coupled to the drain; a load inductor coupled between a power voltage source and the output terminal; a load capacitor coupled between the output terminal and the reference voltage source; a variable resistor coupled between the power voltage source and the output terminal in parallel to the load inductor; and at least one pull-up capacitor deployed in parallel with the load inductor wherein each of the at least one pull-up capacitors are independently selectable by a plurality of switches coupling each of the at least one capacitors with the load inductor.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.
REFERENCES:
patent: 3191127 (1965-06-01), Theriault
patent: 3559088 (1971-01-01), Booth et al.
patent: 4559503 (1985-12-01), Camand et al.
patent: 5355096 (1994-10-01), Kobayashi et al.
Jeong Hoe-Sam
Lee Seung-Wook
Lee Won-Seok
Choe Henry
Fleshner & Kim LLP
GCT Semiconductor Inc.
Pascal Robert
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