Oscillators – Ring oscillators
Reexamination Certificate
2000-04-12
2003-01-28
Kinkead, Arnold (Department: 2817)
Oscillators
Ring oscillators
C331S046000, C331S049000, C331S074000, C327S144000, C327S395000, C327S274000, C327S287000, C327S288000, C327S403000
Reexamination Certificate
active
06512420
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to oscillator circuits. More particularly, the invention concerns a voltage controlled oscillator (VCO) providing an output frequency that is adjustable by selectively combining different phase signals from separate signal paths.
2. Description of the Related Art
Generally, a VCO is a circuit that provides an oscillating output signal, such as a square wave, whose frequency can be changed by varying a voltage input. VCOs are used in many different circuits today, such as clock recovery units, phase locked loops, and synthesizers.
Conventional VCOs utilize a number of inverters coupled in series, where each inverter also functions as a delay element. By utilizing an odd number of inverters, the last inverter's output is opposite that of the first inverter's input. By feeding the last inverter's output back to the first inverter, this creates an unstable situation and the circuit begins to oscillate. Namely, the output changes between positive and negative amplitudes in sinusoid, square wave, or rounded-corner square wave fashion.
FIG. 1
depicts one type of conventional VCO
100
. The VCO
100
includes serially connected delay elements
102
-
104
, each of which comprises a differential pair. Each delay element
102
-
104
receives two input signals; the differential pairs serve to invert each input signal and thereby provide a complementary pair of output signals. The dual signals are related in that they are inversely proportional, i.e., if one signal larger, the other signal should be smaller. The delay elements
102
-
104
provide their output signals upon lines
107
-
108
, which are fed back to the first delay element
102
. The output signals on lines
107
-
108
are also directed to a buffer
106
, which processes the output signals by amplifying and isolating them. The final output signals appear on the lines
112
,
114
.
Each delay element
102
-
104
is coupled to common bias inputs
110
,
111
. The signals upon the bias inputs
110
,
111
determine the delay introduced by each serial element
102
-
104
, and hence the overall circuit's output frequency.
FIG. 2
depicts a conventional delay element
200
. The circuit
200
includes dual transistors pairs, including inner transistors
202
,
203
and outer transistors
206
,
207
. The inner transistors
202
,
203
are biased by the transistor
214
, and the outer transistors
206
,
207
are biased by the transistor
216
. The gates of the inner and outer transistors
202
,
206
are coupled by a gate resistor
210
. Similarly, gates of inner and outer transistors
203
,
207
are coupled by a gate resistor
211
.
Input signals (such as from the lines
107
,
108
or a previous delay element) are directed to the outer transistors' gates
206
a,
207
a.
The output signals of the circuit
200
appear at the nodes
206
b,
207
b.
These output signals appear on the lines
107
,
108
(in the case of the final delay element
104
), or on the inputs to a subsequent delay element (in the case of earlier delay elements
102
,
103
). Frequency control in the circuit
200
is achieved by favoring one of the transistor pairs
202
-
203
,
206
-
207
against the other.
In the circuit
200
, two differential pairs share the same loads and also the same inputs. The differential pair
202
-
203
is slowed by the added gate resistors. The signal will favor the pair with a higher tail current. If the tail current of the differential pair
202
-
203
is higher than the transistors
206
-
207
, the signal through the circuit
200
will be delayed more and the oscillation frequency will be slower. On the other hand, if the tail current of the differential pair
206
-
207
is higher, the signal will favor this differential pair, the delay through the circuit
200
will be shorter, and the oscillation frequency will be higher.
FIG. 3
shows a conventional buffer
300
. Namely, the buffer comprises a differential amplifier with paired transistors
302
,
304
, a bias transistor
306
, and voltage supply resistors
307
,
308
.
Although the foregoing circuits constitute a significant advance and enjoy some commercial success today, the assignee of the present application has continually sought to improve the performance and efficiency of available VCO circuits. Some areas of possible focus concern decreasing of noise, increasing oscillation frequency, and lowering the sensitivity of the output frequency to input changes (“VCO gain”).
In this respect, the present inventors have discovered that the inherent parasitic capacitance of the transistors
202
,
206
(and
203
,
207
) is additive because the transistors are coupled in parallel. This increased capacitance might even prevent the VCO
100
from oscillating at some higher frequencies. Additionally, the inventors have discovered that the gate resistors
210
,
211
tend to act as noise sources, and due to their presence near the inputs
206
a,
207
a,
the added noise is even more pronounced.
Consequently, conventional VCOs may not be completely adequate in all applications, especially those applications requiring particularly low noise or high frequency VCOs.
SUMMARY OF THE INVENTION
Broadly, the present invention concerns a VCO providing an output frequency that is adjustable by selectively combining different delay signals from separate signal paths. The present invention's VCO includes first and second differential delay paths, each exhibiting a different delay or “phase”. Each signal path includes a series coupling of multiple delay elements, where each delay element comprises a single differential amplifier transistor pair (“differential pair”). Each signal path's time delay is adjustable by changing the biasing and geometry of the delay paths' differential amplifier transistor pairs.
A combiner, separately coupled to each delay path, selectively combines signals from the signal paths to provide a representative output. This output is also fed back as input to both signal paths. As an example, the combiner may be provided by two non-nested differential pairs. The ratio at which the combiner combines signals from the signal paths, and hence the VCO's output frequency, may be changed by adjusting the biasing of the combiner's differential pairs. Since the combiner's output signal is fed back to the delay paths, the combiner's frequency is adopted by the signal paths.
A buffer may be coupled to the VCO for the purpose of amplifying, isolating, sampling, storing, or favorably loading the VCO's output. In one embodiment, the buffer is coupled to the output of one of the signal paths. In another embodiment, the buffer is coupled to the output of the combiner.
The foregoing features may be implemented in a number of different forms. For example, one aspect of the invention comprises an apparatus, such as a VCO circuit. Another aspect involves a method to operate such a VCO circuit as shown herein.
The invention affords its users with a number of distinct advantages. Importantly, the present invention's VCO exhibits lower noise than conventional high frequency VCOs. One reason is that the delay elements utilize single pair differential amplifiers, rather than dual pair, nested differential amplifiers that tend to amplify certain types of noise. Noise is also reduced because the two signal paths are arranged in parallel, rather in series as with previous designs.
As another benefit of the invention, higher oscillation frequencies are possible because the delay elements are advantageously structured to minimize parasitic capacitance. For example, the differential amplifier structure avoids using gate resistors, and therefore avoids this possible source of noise. Furthermore, the circuit's noise is inherently less than the noise of either signal path, due to the parallel signal path arrangement. Furthermore, the invention exhibits higher signal strength at higher oscillation frequencies because, on the average, there is less l
Bryan Thomas
Eker Mehmet M
Applied Mirco Circuits Corporation
Gray Cary Ware & Freidenrich
Kinkead Arnold
Meador Terrance A.
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