Variable frequency logic clock

Patent

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Details

328 63, 328119, 328152, H03K 3017

Patent

active

043161480

ABSTRACT:
A logic clock signal generator implemented with delay lines having a plurality of taps, wherein the taps are selectively feedback coupled to the input to produce a clock signal having a plurality of selectively variable time periods.

REFERENCES:
patent: 4165490 (1979-08-01), Howe et al.

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