Variable delay circuit, ring oscillator, and flip-flop circuit

Details Variable delay circuit, ring oscillator, and flip-flop circuit Variable delay circuit, ring oscillator, and flip-flop circuit

1995-10-19

1997-10-28

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Having specific delay in producing output waveform

327263, 327176, 327164, H03K 513, H03K 708, H03K 1728

Patent

active

056821140

ABSTRACT:
In a variable delay circuit for delaying an input signal by a variable delay time from a rising edge or a falling edge of the input signal to a rising edge or a falling edge of an output signal in a digital circuit, a data signal input terminal; a first signal input terminal to which a low-level signal of a logic gate is applied; n selector circuits (n=integer larger than 0) selecting either the signal at the data signal input terminal or the signal at the first signal input terminal in response to signals applied to first selector signal input terminals; and an (n+1)-input NOR circuit to which the signal at the data signal input terminal and output signals from the selector circuits are applied. In this variable delay circuit, a delay time shorter than the delay time of a single-stage buffer circuit can be controlled using only digital circuits.

REFERENCES:
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patent: 5389828 (1995-02-01), Tago
patent: 5396110 (1995-03-01), Houston
patent: 5459422 (1995-10-01), Bechrin
patent: 5465076 (1995-11-01), Yamauchi et al.
patent: 5495197 (1996-02-01), Hayashi et al.
Murakami et al, "A Digitally Programmable Delay Line And Duty Cycle Controller With Picosecond Resolution", IEEE Bipolar Circuits and Technology Meeting, 1991, pp. 218-221.
"A GaAs DCFL Variable Delay Circuit for 2.5 GHZ", 1991 Spring National Convention Record, The Institute of Electronics, Information and Communication Engineers.

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