Variable-delay circuit

Details Variable-delay circuit Variable-delay circuit

1993-03-08

1994-07-05

Callahan, Timothy P.

Electrical transmission or interconnection systems

With nonswitching means responsive to external nonelectrical...

Temperature responsive

307605, 307608, 328 55, H03K 513

Patent

active

053270312

ABSTRACT:
A variable delay circuit including a fixed delay circuit (D1) furnishing a signal (e.sub.1) that is delayed with respect to the input signal (e.sub.0). A combination circuit (C) furnishes a combination signal (f.sub.K) resulting from the superposition, with weighting and an integral effect of the input (e.sub.0) and delayed (e.sub.1) signals. The assembly is dimensioned such that the fixed delay (T) is less than the transition time that the combination signal (f.sub.K) has when only the input signal (e.sub.0) is applied.

REFERENCES:
patent: 4795923 (1989-01-01), Dobos
patent: 4797586 (1989-01-01), Traa
patent: 4947064 (1990-08-01), Kim et al.
patent: 5063311 (1991-11-01), Swapp
patent: 5111085 (1992-05-01), Stewart
patent: 5118975 (1992-06-01), Hillis et al.
patent: 5160863 (1992-11-01), Hui
patent: 5185540 (1993-02-01), Boudry
patent: 5231319 (1993-07-01), Crafts et al.
Technical note "Transistor Memory Precharge Circuit" by Andrew G. P. Dingwall, sheet 1 of 2, a publication of RCA, Feb. 18, 1976.
Patent Abstracts of Japan, vol. 10, No. 213 (E-422) (2269) 25 Jul. 1986 (Hitachi Ltd).

Affiliated with

Also associated with

Rating

Variable-delay circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Variable-delay circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Variable-delay circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-798017