Variable delay circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

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Details

326 93, 327144, 327146, 327153, 327161, 327163, 327162, H03K 500

Patent

active

058015620

ABSTRACT:
A variable delay circuit is disclosed comprising first and second clock delay sections, first and second phase comparison circuits, first and second data delay sections, and a selector. The first and second clock delay sections delay a clock signal to generate first and second delayed clock signals. The first and second phase comparison circuits respectively detect a phase difference between the clock signal and the first delayed clock signal and a phase difference between the clock signal and the second delayed clock signal. The first and second phase comparison circuits then respectively supply first and second delay control signals indicating the phase differences to the first and second clock delay sections so as to equalize the delay times of the clock delay sections to a period of the clock signal. The first and second data delay circuits delay a data signal. The delay times of the first and second data delay sections are respectively controlled based on the first and second delay control signals so as to be proportional to the period of the clock signal. One of the output signals of the first and second data delay sections is selected by the selector based on a delay designating data.

REFERENCES:
patent: 5184027 (1993-02-01), Masuda et al.
patent: 5491673 (1996-02-01), Okayasu
patent: 5497263 (1996-03-01), Masuda et al.

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