Variable current sinking for coarse/fine programming of...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S185280

Reexamination Certificate

active

07414887

ABSTRACT:
A non-volatile memory device is programmed by first performing a coarse programming process and subsequently performing a fine programming process. The coarse/fine programming methodology is enhanced by using an efficient verification scheme that allows some non-volatile memory cells to be verified for the coarse programming process while other non-volatile memory cells are verified for the fine programming process. The fine programming process can be accomplished using current sinking, charge packet metering or other suitable means.

REFERENCES:
patent: 5220531 (1993-06-01), Blyth et al.
patent: 5313421 (1994-05-01), Guterman et al.
patent: 5412601 (1995-05-01), Sawada et al.
patent: 5521865 (1996-05-01), Ohuchi et al.
patent: 5570315 (1996-10-01), Tanaka et al.
patent: 5652719 (1997-07-01), Tanaka et al.
patent: 5712180 (1998-01-01), Guterman et al.
patent: 5712815 (1998-01-01), Bill et al.
patent: 5761222 (1998-06-01), Baldi
patent: 5870344 (1999-02-01), Ozawa
patent: 5926409 (1999-07-01), Engh et al.
patent: 5949714 (1999-09-01), Hemink et al.
patent: 6151248 (2000-11-01), Harari et al.
patent: 6222762 (2001-04-01), Guterman et al.
patent: 6243290 (2001-06-01), Kurata et al.
patent: 6266270 (2001-07-01), Nobukata
patent: 6301161 (2001-10-01), Holzmann et al.
patent: 6317364 (2001-11-01), Guterman et al.
patent: 6424566 (2002-07-01), Parker
patent: 6522580 (2003-02-01), Chen et al.
patent: 6525964 (2003-02-01), Tanaka et al.
patent: 6529412 (2003-03-01), Chen et al.
patent: 6532172 (2003-03-01), Harari et al.
patent: 6597603 (2003-07-01), Lambrache
patent: 6856551 (2005-02-01), Mokhlesi et al.
patent: 7002843 (2006-02-01), Guterman et al.
patent: 2002/0024846 (2002-02-01), Kawahara et al.
patent: 2002/0057598 (2002-05-01), Sakamoto
patent: 2002/0118574 (2002-08-01), Gongwer et al.
patent: 2003/0147278 (2003-08-01), Tanaka et al.
patent: 1249842 (2002-10-01), None
Kurata, Hideaki, et al., Constant-Charge-Injection Programming for 10-MB/s Multilevel AG-AND Flash Memories, 2002 Symposium on VLSI Circuits Digest of Technical Papers, pp. 302-303.
Johnson, William S., et al., Session XII: ROMs, PROMs and EROMs, 1980 IEEE International Solid State Circuits Conference, pp. 152-153.
Nobukata, Hiromi, et al., A 144Mb 8-Level NAND Flash Memory with Optimized Pulse Width Programming, 1999 Symposium on VLSI Circuits Digest of Technical Papers, pp. 39-40.
Ohkawa, Masayoshi, et al., TP 2.3: A 98 mm2 3.3V 64Mb Flash Memory with FN-NOR Type 4-level Cell, 1996 IEEE International Solid-State Circuits Conference, pp. 36-37.
Notice of Allowance, dated Aug. 13, 2007, U.S. Appl. No. 11/550,502, filed Oct. 18, 2006; Allowed Claims.
Office Action dated Mar. 18, 2008, U.S. Appl. No. 11/550,499, filed Oct. 18, 2006.
Office Action dated Mar. 18, 2008, U.S. Appl. No. 11/429,769, filed May 8, 2006.
Office Action dated May 28, 2008, U.S. Appl. No. 11/429,770, filed May 8, 2006.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Variable current sinking for coarse/fine programming of... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Variable current sinking for coarse/fine programming of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Variable current sinking for coarse/fine programming of... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3995616

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.