Variable current sinking for coarse/fine programming of...

Static information storage and retrieval – Floating gate – Multiple values

Reexamination Certificate

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C365S185280

Reexamination Certificate

active

07002843

ABSTRACT:
A non-volatile memory device is programmed by first performing a coarse programming process and subsequently performing a fine programming process. The coarse/fine programming methodology is enhanced by using an efficient verification scheme that allows some non-volatile memory cells to be verified for the coarse programming process while other non-volatile memory cells are verified for the fine programming process. The fine programming process can be accomplished using current sinking, charge packet metering or other suitable means.

REFERENCES:
patent: 5220531 (1993-06-01), Blyth et al.
patent: 5313421 (1994-05-01), Guterman et al.
patent: 5412601 (1995-05-01), Sawada et al.
patent: 5521865 (1996-05-01), Ohuchi et al.
patent: 5570315 (1996-10-01), Tanaka et al.
patent: 5652719 (1997-07-01), Tanaka et al.
patent: 5712180 (1998-01-01), Guterman et al.
patent: 5712815 (1998-01-01), Bill et al.
patent: 5761222 (1998-06-01), Baldi
patent: 5870344 (1999-02-01), Ozawa
patent: 5926409 (1999-07-01), Engh et al.
patent: 5949714 (1999-09-01), Hemink et al.
patent: 6151248 (2000-11-01), Harari et al.
patent: 6222762 (2001-04-01), Guterman et al.
patent: 6243290 (2001-06-01), Kurata et al.
patent: 6266270 (2001-07-01), Nobukata
patent: 6301161 (2001-10-01), Holzmann et al.
patent: 6317364 (2001-11-01), Guterman et al.
patent: 6424566 (2002-07-01), Parker
patent: 6522580 (2003-02-01), Chen et al.
patent: 6525964 (2003-02-01), Tanaka et al.
patent: 6529412 (2003-03-01), Chen et al.
patent: 6532172 (2003-03-01), Harari et al.
patent: 6856551 (2005-02-01), Mokhlesi et al.
patent: 2002/0024846 (2002-02-01), Kawahara et al.
patent: 2002/0057598 (2002-05-01), Sakamoto
patent: 2002/0118574 (2002-08-01), Gongwer et al.
patent: 2003/0147278 (2003-08-01), Tanaka et al.
patent: 1249842 (2002-10-01), None
Kurata, Hideaki, et al., Constant-Charge-Injection Programming for 10-MB/s Multilevel AG-AND Flash Memories, 2002 Symposium On VLSI Circuits Digest of Technical Papers, pp. 302-303.
Johnson, William S., et al., Session XII: ROMs PROMs and EROMs, 1980 IEEE International Solid State Circuits Conference, pp. 152-153.
Nobukata, Hiromi, et al., A 144Mb 8-Level NAND Flash Memory with Optimized Pulse Width Programming, 1999 Symposium on VLSI Circuits Digest of Technical Papers, pp. 39-40.
Ohkawa, Masayoshi, et al., TP 2.3: A 98 mm2 3.3V 64Mb Flash Memory with FN-NOR Type 4-level Cell, 1996 IEEE International Solid-State Circuits Conference, pp. 36-37.

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