Variable codec frame length

Details Variable codec frame length Variable codec frame length

1998-05-11

2004-01-13

Rao, Seema S. (Department: 2666)

Multiplex communications

Data flow congestion prevention or control

C370S465000, C370S470000

Reexamination Certificate

active

06678243

ABSTRACT:

TECHNICAL FIELD
This invention relates to compensating data rates, and more particularly to modifying asynchronous data rates to compensate for data rate differences in successive blocks of a circuit.
BACKGROUND
Data sent to a codec may be sourced at an asynchronous rate. Overflow or underflow of the data may result if the data rate in one portion of a circuit is different from the data rate in a following section.
For example, audio data sent via a streaming pipe over the internet may be played as it is downloaded, e.g., using the MP3 standard. Downloading starts, a buffer is accumulated, and then the data is decompressed and played while the remainder downloads. The rate at which the data may be received from the internet server is directly dependent on the type of modem connection and how variable that connection is over time. As time goes on, a poor connection may lead to, for example, loss of data packets. As packets are retransmitted, the host side buffer may be drained and the data may run out.
This possible problem is described in the context of a digital-to-analog converter (“DAC”) system
10
. A DAC system
10
includes a digital portion
19
and an analog portion
21
. If the DAC is an oversampling delta-sigma type, the digital portion will typically include an interpolator
13
. The interpolator
13
includes an interpolation filter
23
and a sample-and-hold circuit
25
. The interpolation filter
23
increases the sample rate and removes or significantly attenuates energy at f
s
/2 and above, where f
s
is the input sampling frequency. The output of the interpolation filter
23
is processed through the sample-and-hold circuit
25
to provide an over-sampled output.
The output of the sample-and-hold circuit
25
is sent to modulator
15
which converts the oversampled signal into a one-bit data stream. The modulator
15
may be a delta-sigma modulator which provides good low level performance and can act as a one-bit digital quantizer. The one-bit data stream is sent to a one-bit DAC
29
. The signal from the one-bit DAC
29
is then fed to the analog portion
21
.
The analog portion
21
includes at least a filter
17
. The filter
17
may be an analog low pass filter such as a switched capacitor filter.
A typical rate at which data may stream through the DAC system
10
may be 48 kHz. If this data is then passed to a downstream circuit which operates at a different speed, such as a constrained pipe, the data will either back up (if the downstream circuit operates at a lower speed), or stall (if the downstream circuit operates at a higher speed). For example, data may be recorded at 48 kHz and subsequently stored. The data may then be streamed to a system through a constrained pipe at an average rate of 46 kHz. The output will periodically stall because the data rate through the constrained pipe cannot be increased.
The present invention addresses the above problems by dynamically compensating for differences in data rates. In one embodiment, the status of an input buffer is monitored and used to change the number of oversamples within a frame. In another embodiment, the input buffer is still monitored but a high frequency clock in the system is used to stall the codec for one clock. In both embodiments, distortion due to differences in data rates is reduced.
In one embodiment, the method includes steps of receiving samples of a signal at a sampling rate, oversampling the sampled signal to generate a prespecified number of oversamples per a frame, and deleting or repeating one or more of the oversamples per frame to remove the overflow or underflow condition.
In another embodiment, the method includes steps of receiving samples of a signal at a sampling rate and oversampling the sampled signal to generate one of a prespecified number of oversamples per a frame. The prespecified number is equal to a nominal number in the absence of an overflow or underflow condition, the prespecified number is greater than the nominal number in an underflow condition, and the prespecified number is less than the nominal number in an overflow condition.
In another embodiment, the method includes steps of receiving samples of a signal at a sampling rate, oversampling the sampled signal to generate a prespecified number of oversamples per a frame; and stalling the circuit for a number of cycles of the master clock to remove the overflow or underflow condition.
The details of one or more embodiments of the invention are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the invention will be apparent from the description and drawings, and from the claims.


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