Variable capacitance with delay lock loop

Details Variable capacitance with delay lock loop Variable capacitance with delay lock loop

2011-01-18

2011-01-18

Pascal, Robert (Department: 2817)

Oscillators

With frequency adjusting means

With voltage sensitive capacitor

C332S109000, C331S158000, C331S176000

Reexamination Certificate

active

07872542

ABSTRACT:
An integrated circuit includes a delay lock loop (DLL) circuit that generates incremental delay line signals and a delay line output signal based on a received clock signal. A pulse-width modulation (PWM) control module generates a PWM control signal. A tunable circuit having variable capacitance is controlled based on the delay line output signal, the PWM control signal, and one of the incremental delay line signals.

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