Variable bit rate clock recovery circuit

Details Variable bit rate clock recovery circuit Variable bit rate clock recovery circuit

1988-09-08

1990-01-02

Heyman, John S.

Pulse or digital communications

Repeaters

Testing

328 63, 328155, 375110, 375119, 331 18, 307269, H03L 700

Patent

active

048915980

ABSTRACT:
In a variable bit rate clock recovery circuit, a phase difference between an input demodulated signal and a recovered clock signal is detected, the detected phase difference signal is filtered by a loop filter and is then integrated, the integrated signal is supplied as an address to first and second ROMs, which store data of cosine and sine waves in advance, output data from the first and second ROMs are respectively D/A-converted by first and second D/A converters, an output signal from a variable frequency generator is modulated by using an output from the first D/A converter, a signal obtained by shifting the output signal from the variable frequency signal generator by .pi./2 radians is modulated by an output from the second D/A converter, and the respective modulated signals are synthesized, thereby obtaining a reference clock signal.

REFERENCES:
patent: 4280099 (1981-07-01), Rattlingourd
patent: 4590445 (1986-05-01), Tabourier et al.
patent: 4631484 (1986-12-01), Malka et al.
patent: 4694196 (1987-09-01), Hasley et al.
patent: 4707842 (1987-11-01), Fischer

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