Abrading – Abrading process – Glass or stone abrading
Reexamination Certificate
1999-08-19
2001-02-13
Banks, Derris H. (Department: 3723)
Abrading
Abrading process
Glass or stone abrading
C451S063000, C451S287000
Reexamination Certificate
active
06186870
ABSTRACT:
TECHNICAL FIELD
The present invention relates to polishing pads used in mechanical and/or chemical-mechanical planarization of substrates, and more particularly to a polishing pad with an abrasive planarizing surface.
BACKGROUND OF THE INVENTION
Chemical-mechanical planarization (“CMP”) processes remove material from the surface of semiconductor wafers or other substrates in the production of integrated circuits.
FIG. 1
schematically illustrates a CMP machine
10
with a platen
20
, a wafer carrier
30
, and a polishing pad
40
. The polishing pad
40
may be a conventional polishing pad made from a continuous phase matrix material (e.g., polyurethane), or it may be an abrasive polishing pad made from abrasive particles fixedly dispersed in a suspension medium. The planarizing liquid
44
may be a conventional CMP slurry with abrasive particles and chemicals that remove material from the wafer, or the planarizing liquid
44
may be a planarizing solution without abrasive particles. In most CMP applications, conventional CMP slurries are used on conventional polishing pads, but planarizing solutions without abrasive particles are used on abrasive polishing pads.
The CMP machine
10
also has an under pad
25
attached to an upper surface
22
of the platen
20
and the lower surface of the polishing pad
40
. A drive assembly
26
rotates the platen
20
(as indicated by arrow A), or it reciprocates the platen back and forth (as indicated by arrow B). Since the polishing pad
40
is attached to the under pad
25
, the polishing pad
40
moves with the platen
20
.
The wafer carrier
30
has a lower surface
32
to which a wafer
12
may be attached, or the wafer
12
may be attached to a resilient pad
34
positioned between the wafer
12
and the lower surface
32
. The wafer carrier
30
may be a weighted, free-floating wafer carrier; or an actuator assembly
36
may be attached to the wafer carrier
30
to impart axial and/or rotational motion (indicated by arrow C and arrow D, respectively).
To planarize the wafer
12
with the CMP machine
10
, the wafer carrier
30
presses the wafer
12
face-downward against the polishing pad
40
, and at least one of the platen
20
or the wafer carrier
30
moves relative to the other to move the wafer
12
across the planarizing surface
42
. As the face of the wafer
12
moves across the planarizing surface
42
, the polishing pad
40
and/or planarizing solution
44
continually remove material from the face of the wafer
12
.
CMP processes must consistently and accurately produce a uniform planar surface on the wafer to enable precise circuit and device patterns to be formed with photolithography techniques. As the density of integrated circuits increases, it is often necessary to accurately focus the critical dimensions of the photo-patterns to within a tolerance of approximately 0.1 &mgr;m. Focusing photo patterns to such small tolerances, however, is difficult when the planarized surface of the wafer is not uniformly planar. Thus, CMP processes must create a highly uniform planar surface.
One problem with the CMP processes is that the surface of the wafer may not be uniformly planar because the rate at which the thickness of the wafer decreases (the “polishing rate”) may vary from one area of the wafer to another. The polishing rate depends, in part, on the relative linear velocity between the surface of the wafer and the portion of the planarizing surface contacting the wafer. The linear velocity of the planarizing surface of a circular, rotating polishing pad varies across the planarizing surface of the pad in proportion to the radial distance from the center of the pad. Similarly, the linear velocity also varies across the front face of the wafer in proportion to the radial distance from the center of the wafer. The variation of linear velocities across the face of the wafer and planarizing surface of the polishing pad creates a relative velocity gradient between the wafer and the polishing pad. In general, the relative velocity gradient between the wafer and the pad causes the polishing rate to vary across the face of the wafer in a center-to-edge profile where the perimeter of the wafer polishes faster than the center of the wafer.
Several devices and concepts have been developed to reduce the center-to-edge planarizing profile across wafers. For example, U.S. Pat. No. 5,020,283 to Tuttle discloses a non-abrasive polishing pad with voids in the surface of the pad. The area of the planarizing surface occupied by the voids increases with increasing radial distance to reduce the contact area between the wafer and an abrasive slurry on the surface of the polishing pad towards the perimeter of the pad. Thus, at the periphery of the pad where the linear velocity of the pad is high, the voids reduce the polishing rate of the wafer compared to a planarizing surface without voids.
Although the non-abrasive polishing pad of U.S. Pat. No. 5,020,283 reduces the nonuniformity in polishing rates across a wafer, it may not provide adequate control of the polishing rate to produce a uniformly planar surface on the wafer. The pad of U.S. Pat. No. 5,020,283 seeks to control the polishing rate across the wafer by reducing contact area between the wafer and the slurry at selected areas on the pad. However, the distribution of the slurry between the wafer and the pad may not be uniform under the wafer because the perimeter of the wafer wipes the slurry off the planarizing surface leaving less slurry under the center of the wafer. Thus, even though existing devices control the contact area between the wafer and the pad at selected regions of the pad, they may not effectively control the polishing rate across the face of the wafer.
SUMMARY OF THE INVENTION
The present invention is an abrasive polishing pad for uniformly planarizing a semiconductor wafer or other substrate. In one embodiment, the abrasive polishing pad has a planarizing surface with a first planarizing region and a second planarizing region. The first planarizing region has a first abrasiveness and the second planarizing region has a second abrasiveness different than the first abrasiveness of the first region. The polishing pad preferably has a plurality of abrasive elements at the planarizing surface in at least one of the first or second planarizing regions. The abrasive elements may be abrasive particles fixedly suspended in a suspension medium, contact
on-contact regions on the pad, or other elements that mechanically remove material from the wafer. In the operation of a preferred embodiment, the lesser abrasive of the first and second planarizing regions contacts a first area of the wafer where the relative velocity between the wafer and the polishing pad is relatively high, and the more abrasive of the first and second planarizing regions contacts a second area of the wafer where the relative velocity between the wafer and the polishing pad is relatively low. The different abrasivenesses of the first and second planarizing regions compensate for variations in relative velocities across the face of the wafer to more uniformly planarize the wafer.
To control the abrasiveness of the first and planarizing second regions, several embodiments of abrasive polishing pads in accordance with the invention vary a characteristic of the abrasive elements in the first and second planarizing regions. In one embodiment, for example, the first region may have a higher number of abrasive elements per unit of surface area on the planarizing surface than the second region. In another embodiment, the first region may have abrasive elements with a size or shape that is more abrasive than that of the abrasive elements in the second region. In still another embodiment, the first region may have abrasive particles made from one material and the second region may have abrasive particles made from a different, less abrasive material.
REFERENCES:
patent: 6062958 (2000-05-01), Wright et al.
Skrovan John K.
Wright David Q.
Banks Derris H.
Dorsey & Whitney LLP
Micro)n Technology, Inc.
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