Semiconductor device manufacturing: process – Voltage variable capacitance device manufacture
Reexamination Certificate
2001-12-13
2003-02-18
Chaudhuri, Olik (Department: 2814)
Semiconductor device manufacturing: process
Voltage variable capacitance device manufacture
C257S596000
Reexamination Certificate
active
06521506
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to complementary metal oxide semiconductor (CMOS) and bipolar/CMOS (BiCMOS) devices which include a varactor that has improved tunability associated therewith as well as processes for fabricating such devices. The inventive electronic devices, which include the varactor, are highly suitable for use in mobile or cellular phones, personnel digital assistances (PDAs) and other high RF (radio frequency) electronic devices.
BACKGROUND OF THE INVENTION
Varactors are electronic devices which have a capacitance that is controlled by a suitable voltage or current bias. Varactors are typically employed, for example, in so-called voltage controlled oscillators (VCOs) where a frequency of an oscillator is controlled by an applied current or voltage. In such instances, the VCOs are used when a variable frequency is required, or when a signal needs to be synchronized to a reference signal.
In radio communication devices such as mobile/cellular phones, VCOs are typically employed in phase locked loop circuits to generate suitable signals including: generation of a reference signal that is synchronized with a signal received by a radio receiver; modulation/demodulation operations and frequency synthesis.
Numerous varactors have been developed and are successfully employed in integrated circuit technologies. For example, it is known to employ pn-diodes, Schottky diodes or MOS-diodes as a varactor in bipolar, CMOS and BiCMOS technologies. In the article to R. A. Moline, et al., entitled “Ion-Implanted Hyperabrupt Junction Voltage Variable Capacitors” IEEE Trans. Electron. Device, ED-19, pp267f, 1972, varactors comprising pn-diodes are described. U.S. Pat. No. 3,638,300 to Foxhall, et al.; U.S. Pat. No. 4,226,648 to Goodwin, et al.; U.S. Pat. No. 4,827,319 to Pavlidis, et al, and U.S. Pat. No. 5,557,140 to Nguyen, et al. describe other types of variable capacitor (i.e., varactor) diodes that include hyper-abrupt ion-implanted junctions. The term ‘hyper-abrupt’ denotes that the implant has a doping profile that is in contact with the wall of the adjacent extrinsic base region. U.S. Pat. No. 4,973,922 to Embree, et al.; U.S. Pat. No. 5,965,912 to Stolfa, et al; and U.S. Pat. No. 6,100,770 to Litwin, et al., on the other hand, describe MOS-diodes which are employed as varactors.
The integration of varactors depends on the capability of the integrated circuit technology. An overview of integrated circuit devices for high RF applications in BiCMOS technology is described, for example, in J. N. Burghartz, et al. “Integrated RF and Microwave Components in BiCMOS Technology”, IEEE Trans. Electron Devices, Col. 43, pp1559, September 1996. As is stated therein, varactors are not a part of the standard BICMOS device set. Instead, it is proposed to employ a collector-base junction of a bipolar transistor as a varactor.
In order to use a device as a varactor, the device must satisfy one or more, preferably two or more, of the following criteria: (1) tunability must be high (on the order of about 3 or greater); (2) Quality factor, Q, must be high (on the order of about 20 or greater); and (3) the device must exhibit linearity.
Many of the known prior art varactors do not meet the above criteria. For example, traditional base-collector junction varactors rely on the NPN base-collector profile, which is not optimized for varactor tunability. In the case of hyper-abrupt base-collector junction varactors, where the doping profile of the implant is located at the “wall” of the extrinsic base region, the device lacks linearity. With traditional MOS varactors, the tunability is high; however, an even higher tunability is often required.
In view of the above-mentioned drawbacks with prior art varactors, there is a continued need for providing new and improved varactors which satisfy the above criteria and that can be integrated with CMOS and BiCMOS devices.
SUMMARY OF THE INVENTION
One object of the present invention is to provide a highly tunable varactor for use in CMOS and BiCMOS applications.
Another object of the present invention is to provide a highly tunable varactor which is also highly linear.
A yet further object of the present invention is to provide varactors which can be easily implemented in existing CMOS and BiCMOS technologies.
An even further object of the present invention is to provide methods of fabricating varactors which are highly tunable, highly linear and have the highest possible quality factor associated therewith.
These and other objects and advantages are achieved by providing either a quasi-hyper-abrupt base-collector junction varactor having an Sb (antimony) spike located between the extrinsic base and the subcollector region of a bipolar device; or alternatively, an MOS varactor having a polySi gate and a well region of opposite doping types, i.e., polarity, as well as a subcollector reach-through region to reduce well resistance.
Specifically, the quasi hyper-abrupt base-collector junction varactor of the present invention comprises:
a substrate having a collector region of a first conductivity type atop a subcollector region, said collector region has a plurality of isolation regions present therein;
reach-through implant regions located between at least a pair of said isolation regions;
a SiGe layer atop a portion of said substrate not containing a reach-through implant region, said SiGe layer having an extrinsic base region of a second conductivity type which is different from said first conductivity type; and
an antimony implant region located between said extrinsic base region and said subcollector region.
The present invention also provides a method for fabricating the above-mentioned quasi hyper-abrupt base-collector junction varactor. Specifically, the quasi hyper-abrupt base-collector junction varactor is fabricated utilizing the following processing steps which comprise:
forming a subcollector region in a lower portion of a substrate;
forming a plurality of isolation regions in an upper portion of said substrate;
forming, in any order, a collector region of a first conductivity type and an antimony implant region in said upper portion of said substrate;
forming reach-through implant regions between at least a pair of said isolation regions; and
forming an SiGe layer atop a portion of said collector region which does not include a reach-through implant region, said SiGe layer having an extrinsic base region of a second conductivity type which is different than the first conductivity type and said antimony implant region is not in contact with said extrinsic base region.
Another aspect of the present invention relates to an MOS varactor which has a well region and a poly gate region of different conductivity. Specifically, the inventive MOS varactor comprises:
a substrate having a well region of a first conductivity type atop a subcollector region, said well region has a plurality of isolation regions present therein;
reach-though implant regions located between at least a pair of isolation regions; and
a poly gate region of a second conductivity type that is different from said well region atop a portion of said well region which does not include a reach-through implant region.
The present invention also provides a method for fabricating the above-mentioned MOS varactor. Specifically, the MOS varactor of the present invention is fabricated utilizing the following processing steps which comprise:
providing a substrate having a well region of a first conductivity type atop a subcollector region, said well region including a plurality of isolation regions formed in an upper region thereof and at least a pair of said isolation regions include a reach-through implant region formed therebetween; and
forming a poly gate region on a portion of said well region not containing a reach-through implant region, said poly gate region is of a second conductivity type which is different from said first conductivity type.
REFERENCES:
patent: 3636420 (1972-01-01), Vendelin et al.
patent: 3638300 (1972-02-01), Foxhall et al.
patent: 39093
Coolbaugh Douglas D.
Dunn James S.
Gordon Michael D.
Hammad Mohamed Y.
Johnson Jeffrey B.
Chaudhuri Olik
Farahani Dana
Sabo, Esq. William D.
Scully Scott Murphy & Presser
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