Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry
Patent
1979-02-22
1981-02-10
Buczinski, Stephen C.
Facsimile and static presentation processing
Facsimile
Specific signal processing circuitry
358 84, 358124, H04N 716, H04N 710
Patent
active
042505240
ABSTRACT:
A validation apparatus in a pay television system, including a code detector means for successively detecting a sequence of code signals, from an encoded composite TV signal, a key code circuit means having a key code so as to validate the sequence of code signals detected in said code detector means for generating a first, a second and a third control signals in response to said sequence of code signals, a polarity flip-flop means being set by the first control signal, thereby assuming a first state and being reset by the second control signal, thereby assuming a second state and being toggled by the third control signal, thereby changing from the first state to the second state or changing from the second state to the first state, a counter means for generating an output signal when the number of state changes in said flip-flop means reaches a predetermined value, a feature detector means for generating an output signal when the detector means receives said third control signal in a predetermined number of times which is peculiar to said sequence of code signals, and a gating means for generating an output signal so as to generate a valid signal representing that said encoded composite TV signal is effectively decoded when both the output signal of said counter means and the output signal of the feature detector means are input thereto at the same time.
REFERENCES:
patent: 4024574 (1977-05-01), Nieson
patent: 4068264 (1978-01-01), Pires
patent: 4091417 (1978-05-01), Nieson
Buczinski Stephen C.
Clarion Co. Ltd.
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