Validating continuous signal phase matching in high-speed...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing

Reexamination Certificate

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C716S104000, C716S132000, C716S136000

Reexamination Certificate

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07926013

ABSTRACT:
Methods and apparatus to validate continuous signal phase matching in high-speed nets routed as differential pairs are described. In one embodiment, a primary net of a differential pair may be traversed to determine whether a design rule violation has occurred based on comparison of calculated trace lengths of the primary net and a secondary net against a threshold value. Other embodiments are also described.

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