V.sub.pp only scalable EEPROM memory cell having transistors wit

Static information storage and retrieval – Floating gate – Particular connection

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36518518, 365187, 257319, 257321, 257392, G11C 1604, H01L 29788

Patent

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057611165

ABSTRACT:
An enhanced, scalable EEPROM memory cell is provided with a structure having a plurality of half-height tunnel oxide depletion mode transistors. The structure further has individual wordlines controlling the write and read transistors, respectively. With such a structure, lower voltages are used to program/erase the memory cell. The memory cell is scalable to small dimensions through the use of transistors having half-height tunnel oxide regions.

REFERENCES:
patent: 4885719 (1989-12-01), Brahmbhatt
patent: 4924278 (1990-05-01), Logie
patent: 5331590 (1994-07-01), Josephson et al.

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