Utilization of an arsenic diffused emitter in the fabrication of

Details Utilization of an arsenic diffused emitter in the fabrication of Utilization of an arsenic diffused emitter in the fabrication of

1975-12-08

1977-09-20

Rutledge, L. Dewayne

Metal treatment

Process of modifying or maintaining internal physical...

Chemical-heat removing or burning of metal

29576R, 29578, 148 15, 148186, 148189, 357 63, 357 88, 357 89, 357 90, H01L 21223, H01L 2120

Patent

active

040494780

ABSTRACT:
A substantially square N-type impurity distribution profile in a silicon substrate produces much superior dc and ac characteristics in PN junction devices than can be expected from the usual phosphorus distribution profile. Such a square profile is obtained by diffusion of arsenic in the silicon substrate. The sharper impurity gradient allows a relatively low surface concentration to be used for the device. This lower surface concentration relieves precipitation and dislocation problems.

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patent: 3852127 (1974-12-01), Lamming
Magdo et al., "Ultra High Speed Transistor" I.B.M. Tech. Discl. Bull., vol. 13, No. 6, Nov. 1970, pp. 1423-1424.

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