Using selective deposition to form phase-change memory cells

Details Using selective deposition to form phase-change memory cells Using selective deposition to form phase-change memory cells

2007-05-08

2007-05-08

Pert, Evan (Department: 2826)

Semiconductor device manufacturing: process

Bulk effect device making

C438S593000, C438S652000, C438S200000, C438S660000, C438S669000, C438S670000, C257S002000, C257S003000, C257S004000, C257S005000, C257S200000, C257S289000

Reexamination Certificate

active

10368759

ABSTRACT:
A phase-change memory cell may be formed by selectively depositing the lower electrode in the phase-change memory pore. Thereafter, an adhesion-promoting material may be selectively deposited on the selectively deposited lower electrode and the upper surface surrounding the pore. Through the use of selective deposition techniques, the adhesion-promoting material can be positioned where needed and the lower electrode may be defined in a fashion that may reduce shunting current, reduce device current requirements, and increase dynamic range in some embodiments.

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Hwang, Y.N., Hong, J.S., Lee, S.H., Ahn, S.J., Jeong, G.T., Koh, G.H., Kim, H.J., Jeong, W.C., Lee, S.Y., Park, J.H., Ryoo, K.C.., Horii, H., Ha, Y.H., Yi, J.H., Cho, W.Y., Kim, Y.T., Lee, K.H., Joo, S.H., Park, S.O., Jeong, U.I., Jeong, H.S., and Kim, Kinam, “Completely CMOS-Compatible Phase-Change Nonvolatile RAM Using NMOS Cell Transistors,” presented at 2003 19thIEEE Non-Volatile Semiconductor Memory Workshop, Monterey, California, Feb. 26-20, 2003.
Ha, Y.H., Yi, J.H., Horii, H., Park, J.H., Joo, S.H., Park, S.O., Chung, U-In and Moon, J.T., “An Edge Contact Type Cell for Phase Change RAM Featuring Very Low Power Consumption,” presented at IEEE 2003 Symposium on VLSI Technology, Kyoto, Japan, Jun. 12-14, 2003.
Hwang, Y.N., Hong, J.S., Lee, S.H., Ahn, S.J., Jeong, G.T., Koh, G.H., Oh, J.H., Kim, H.J., Jeong, W.C., Lee, S.Y., Park, J.H., Ryoo, K.C., Horii, H., Ha, Y.H., Yi, J.H., Cho, W.Y., Kim, Y.T., Lee, K.H., Joo, S.H., Park, S.O., Chung, U.I., Jeong, H.S. and Kim, Kinam, “Full Integration and Reliability Evaluation of Phase-change RAM Based on 0.24 mm-CMOS Technologies,” presented at IEEE 2003 Symposium on VLSI Technology, Kyoto, Japan, Jun. 12-14, 2003.
Horii, H., Yi, J.H., Park, J.H., Ha, Y.H., Baek, I.G., Park, S.O., Hwang, Y.N., Lee, S.H., Kim, Y.T., Lee, K.H., Chung, U-In and Moon, J.T., “A Novel Cell Technology Using N-doped GeSbTe Films for Phase Change RAM,” presented at IEEE 2003 Symposium on VLSI Technology, Kyoto, Japan, Jun. 12-14, 2003.

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