Using scatterometry to measure resist thickness and control...

Details Using scatterometry to measure resist thickness and control... Using scatterometry to measure resist thickness and control...

2002-01-16

2002-09-17

Niebling, John F. (Department: 2812)

Semiconductor device manufacturing: process

With measuring or testing

C438S015000, C356S445000

Reexamination Certificate

active

06451621

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention relates generally to semiconductor device manufacturing and more particularly to systems and methods for controlling implants.
BACKGROUND OF THE INVENTION
In the semiconductor industry, there is a continuing trend toward high device densities. To achieve these high device densities, small features on semiconductor wafers are required. These may include the width and spacing of interconnecting lines, spacing and diameter of contact holes, and spacing and width of doped regions of a substrate, such as regions that form buried bit lines in a memory array.
High resolution lithographic processes are used to achieve small features. In general, lithography refers to processes for pattern transfer between various media. In lithography for integrated circuit fabrication, a silicon slice, the wafer, is coated uniformly with a radiation-sensitive film, the resist. The film is selectively exposed with radiation (such as visible light, ultraviolet light, x-rays, or an electron beam) through an intervening master template, the mask or reticle (the terms mask and reticle are used interchangeably herein), forming a particular pattern. Exposed areas of the coating become either more or less soluble than the unexposed areas, depending on the type of coating, in a particular solvent developer. The more soluble areas are removed with the developer in a developing step. The less soluble areas remain on the silicon wafer forming a patterned resist. The pattern of the resist corresponds to the image, or negative image, of the reticle.
One application of a patterned resist is in doping a semiconductor substrate. The resist can mask parts of the semiconductor substrate while other parts are implanted, thereby forming P-N junctions, for example. The dopants can be implanted by bombarding the resist coated substrate with energetic dopant ions. If the dopants have an angle of incidence that is nearly perpendicular with respect to the substrate, the ions become implanted in a pattern that corresponds to the gaps in the resist coating.
Optionally, however, the dopants can bombard the substrate at an angle of incidence that is not perpendicular, as illustrated in FIG.
1
. Such angled implantation has a number of applications. One application is providing diffused sources and drains. Another application, illustrated in
FIG. 1
, is providing narrowly spaced P-N junctions. As illustrated in
FIG. 1
, angled implants can be used to provide periodically spaced n-doped regions
12
in a p-doped substrate
10
, for example. The n-doped regions
12
are provided by implants at two mirror image angles, and one of the angles is illustrated by the arrows in FIG.
1
. As can be seen in
FIG. 1
, there are two n-doped regions
12
for each gap in the patterned resist
14
. Thus, angled implants can provide periodic n-doped regions having half the smallest period achievable by the lithographic process used to pattern the resist
14
.
The size and spacing of the n-doped regions
12
within the substrate
10
depends on the thickness and gap width of the resist
14
in addition to the angle of implantation. Variability in the resist
14
can cause the n-doped regions
12
to form improperly. For example,
FIG. 2
illustrates the result of an angled implant with a patterned resist
24
that is approximately 25% thinner than the resist
14
of FIG.
1
. In
FIG. 2
, adjacent n-doped regions
22
are essentially unseparated for the same angled implantation.
FIG. 3
illustrates the result of an angled implant with a patterned resist
34
that is approximately 25% greater that the resist
14
of FIG.
1
. In
FIG. 3
, approximately none of the dopant reaches substrate
30
for the same angled implantation, and n-doped regions do not form. Variation in resist thickness between the extremes of
FIGS. 2 and 3
can thus result in non-functionality or non-uniform functionality for devices relying on angled implants.
Uncontrolled variations in lithographic processes make providing resists with consistent dimensions very difficult. Variations that affect resist dimensions can occur, for example, in spin coating resists, pre-baking resists, exposing resists, post-baking resists, and developing resists. While process control strategies can reduce these variations, they continue to be present in production processes. Thus, there remains an unsatisfied need for practical systems and methods that reduce, eliminate, and/or compensate for variations in resists that affect the outcome of angled implant processes.
SUMMARY OF THE INVENTION
The following presents a simplified summary of the invention in order to provide a basic understanding of some of its aspects. This summary is not an extensive overview of the invention and is intended neither to identify key or critical elements of the invention nor to delineate its scope. The primary purpose of this summary is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The present invention provides systems and methods wherein scatterometry is used to control implant processes. According to the invention, data relating to resist dimensions is obtained by scatterometry prior to an implant process. The data is used to determine whether a resist is suitable for an implant process and/or determine an appropriate condition, such as an angle of implant or an implantation dosage.
Other advantages and novel features of the invention will become apparent from the following detailed description of the invention and the accompanying drawings. The detailed description and drawings provide exemplary embodiments of the invention. These exemplary embodiments are indicative of but a few of the various ways in which the principles of the invention can be employed.


REFERENCES:
patent: 4963501 (1990-10-01), Ryan et al.
patent: 6052188 (2000-04-01), Fluckiger et al.
patent: 6104486 (2000-08-01), Arimoto
patent: 6173240 (2001-01-01), Sepulveda et al.
patent: 6350397 (2002-02-01), Heikkila et al.
patent: 6383824 (2002-05-01), Lensing
“Scatterometry for the Measurement of Metal Features”, in Metrology, Inspection, and Process Control for Microlithography XIV; Christopher J. Raymond, Steve W. Farrer and Scott Sucher, Proceedings o SPIE, vol. 3998, pp. 135-145 (2000).
“Manufacturing Considerations for Implementation of Scatterometry for Process Monitoring”, In Metrology, Inspection, and Process Control for Microlithography XIV; John Allgair, Dave Benoit, Rob Hershey and Lloyd C. Litt (Motorola); Ibrahim Abdulhalim, Bill Braymer, Michael Faeyrman, John C. Robinson, Umar Whitney, Yiping Xu, Piotr Zalicki and Joel Seligson (KLA-Tencor Corp.) Proceedings of SPIE, vol. 3998 (2000) pp. 125-134.
“Phase Profilometry for the 193 nm Lithography Gate Stack”, In Metrology, Inspection, and Process Control for Microlithography XIV, Nickhil Jakatdar, Xinhui Niu, Junwei Bao, Costas Spanos, Sanjay Yedur and Alain Deleporte, Proceedings of SPIE, vol. 3998 (2000), pp. 116-124.
“Lithographic Process Monitoring using Diffraction Measurements”, In Metrology, Inspection, and Process Control for Microlithography XIV, Emmanuel M. Drege and Dale M. Byrne, Proceedings of SPIE, vol. 3998 (2000), 12 pgs.
An Integrated System of Optical Metrology for Deep Sub-Micron Lithography:, Xinhui Niu, A dissertation submitted in partial satisfaction of the requirements for the degree of Doctor of Philosophy in Engineering-Electrical Engineering ahd Computer Sciences in the Graduate Division of the University of California, Berkeley, Spring, 1999, 153 pp.

Affiliated with

Also associated with

Rating

Using scatterometry to measure resist thickness and control... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Using scatterometry to measure resist thickness and control..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Using scatterometry to measure resist thickness and control... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2862774