Using multiple status models in a computer system

Electrical computers and digital processing systems: interprogra – High level application control

Reexamination Certificate

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C719S315000, C719S316000, C707S803000, C707S807000

Reexamination Certificate

active

07966621

ABSTRACT:
A design-time status schema model describes the progress of a data object through a computing process. The status schema model includes status variables, processing actions and constraints for performing actions. The status schema model also may describe permitted changes to a status variable in response to performing an action. At runtime, the status schema model is used to control processing performed by, or on, an instance of a data object corresponding to the status schema model.

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