Using hall effect to monitor current during IDDQ testing of CMOS

Details Using hall effect to monitor current during IDDQ testing of CMOS Using hall effect to monitor current during IDDQ testing of CMOS

1994-12-29

1996-10-29

Karlsen, Ernest F.

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

324117H, 324765, G01R 3128, G01R 3307

Patent

active

055700349

ABSTRACT:
A method and an apparatus for sensing quiescent current in a CMOS integrated circuit. The present invention utilizes circuitry which is not series coupled to the CMOS integrated circuit under test. The quiescent current, commonly referred to as I.sub.DDQ, flows through the supply line during the quiescent state of the CMOS integrated circuit. A magnetic field sensor is located on the substrate near the supply line of the CMOS integrated circuit. The magnetic field sensor detects the magnetic field generated from the supply line by I.sub.DDQ. The magnetic field sensor is coupled to output circuitry located on the substrate which produces a measurement result calibrated to indicate when I.sub.DDQ has a predetermined value.

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