Using double exposure effects during phase shifting to...

Details Using double exposure effects during phase shifting to... Using double exposure effects during phase shifting to...

2001-04-25

2003-05-20

Rosasco, S. (Department: 1756)

Radiation imagery chemistry: process, composition, or product th

Radiation modifying product or process of making

Radiation mask

C716S030000

Reexamination Certificate

active

06566019

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to the process of fabricating semiconductor chips. More specifically, the invention relates to a method and an apparatus for using double exposure, especially during alternating aperture phase shifting, to control line end shortening arising from optical effects during the semiconductor fabrication process.
BACKGROUND
Related Art
Recent advances in integrated circuit technology have largely been accomplished by decreasing the feature size of circuit elements on a semiconductor chip. As the feature size of these circuit elements continues to decrease, circuit designers are forced to deal with problems that arise as a consequence of the optical lithography process that is typically used to manufacture integrated circuits. This optical lithography process generally begins with the formation of a photoresist layer on the surface of a semiconductor wafer. A mask composed of opaque regions, which are generally formed of chrome, and transmissive clear regions (chromeless), which are generally formed of quartz, is then positioned over this photo resist coated wafer. (Note that the term “mask” as used in this specification is meant to include the term “reticle.”) Exposure energy is then shone on the mask from an exposure energy source, such as a visible light source or an ultraviolet light source.
This exposure energy is generally reduced and focused through an optical system that contains a number of lenses, filters and mirrors. The exposure energy passes through the clear regions of the mask and exposes the underlying photoresist layer. At the same time, the exposure energy is blocked by opaque regions of mask, leaving underlying portions of the photoresist layer unexposed.
The exposed photoresist layer is then developed, typically through chemical removal of the exposed
on-exposed regions of the photoresist layer. The end result is a semiconductor wafer with a photoresist layer having a desired pattern. This pattern can then be used for etching underlying regions of the wafer.
One problem that arises during the optical lithography process is “line end shortening” and “pullback” caused by optical effects. For example, the upper portion of
FIG. 1
illustrates a design of a transistor with a polysilicon line
102
, running from left to right, that forms a gate region used to electrically couple an upper diffusion region with a lower diffusion region. The lower portion of
FIG. 1
illustrates the actual printed image that results from the design. Note that polysilicon line
102
has been narrowed using optical phase shifting in order to improve the performance of the transistor by reducing the resistance through the gate region.
Also note that because of optical effects and resist pullback there is a significant amount of line end shortening.
In order to compensate for line end shortening, designers often add additional features, such as “hammer heads,” onto line ends. As is illustrated in
FIG. 2
, these additional features can effectively compensate for the problem of line end shortening in some situations. However, if these additional features cause line ends to get too close together, a bridge can potentially be created as is illustrated in the middle portion of FIG.
2
.
This bridging problem can be alleviated by introducing a separation between the hammer heads. However, introducing such a separation increases the size of the circuit element, which means that fewer circuit elements can be integrated into the semiconductor chip. Additionally, if hammerheads are added after layout, a design rule violation may occur.
What is needed is a method and an apparatus for mitigating the line end shortening problem without introducing additional separation between line ends.
Another problem in optical lithography arises from incidental exposure caused by phase shifters. Phase shifters are often incorporated into a mask in order to achieve line widths that are smaller than the wavelength of the exposure energy that is used to expose the photoresist layer through the mask. During phase shifting, the destructive interference caused by two adjacent clear areas on a mask is used to create an unexposed area on the photoresist layer. This is accomplished by exploiting the fact that exposure energy passing through a mask's clear regions exhibits a wave characteristic having a phase that is a function of the distance the exposure energy travels through the mask material. By placing two clear areas adjacent to each other on the mask, one of thickness t
1
and the other of thickness t
2
, one can obtain a desired unexposed area on the underlying photoresist layer caused by interference. By varying the thickness t
1
and t
2
appropriately, the exposure energy exiting the material of thickness t
2
is 180 degrees out of phase with the exposure energy exiting the material of thickness t
1
. Phase shifting is described in more detail in U.S. Pat. No. 5,858,580, entitled “Phase Shifting Circuit Manufacture Method and Apparatus,” by inventors Yao-Ting Wang and Yagyensh C. Pati, filed Sep. 17, 1997 and issued Jan. 12, 1999, which is hereby incorporated by reference.
One problem with phase shifters is that they often cause incidental exposure in neighboring regions of the photoresist layer. For example,
FIG. 6
illustrates how two phase shifters are used to reduce the thickness of a polysilicon line
606
in the gate regions of two transistors.
A first phase shifter is composed of a zero-degree phase clear area
604
that works in concert with a 180-degree phase clear area
608
to reduce the width of polysilicon line
606
in the gate region of a first transistor. This first transistor selectively creates a conducting path between diffusion region
602
and diffusion region
610
.
Note that a thin chromium regulator
605
is typically added to the mask between zero-degree phase clear area
604
and 180-degree phase clear area
608
in order to shield a portion of the underling photoresist layer.
Similarly, a second phase shifter is composed of a zero-degree phase clear area
614
that works in concert with a 180-degree phase clear area
618
to reduce the width of polysilicon line
606
in the gate region of a second transistor. This second transistor selectively creates a conducting path between diffusion region
612
and diffusion region
620
. Within the second phase shifter, chromium regulator
615
separates zero-degree phase clear area
604
and 180-degree phase clear area
608
.
The first and second phase shifters are typically incorporated into a separate phase shifting mask, which is used to reduce the width of polysilicon line
606
in the gate regions of the first transistor and the second transistor, respectively.
Unfortunately, using these phase shifters often causes incidental exposure of polysilicon line
606
in the field regions of integrated circuit, such as section
616
of polysilicon line
606
. This incidental exposure can degrade performance of section
616
, or can cause a broken line in section
616
.
One solution to this problem is to extend the first and second phase shifters into the field region, as is illustrated in FIG.
7
. In this way the first and second phase shifters are effectively combined into a single long phase shifter.
This solution protects polysilicon line
606
from incidental exposure. However, it also reduces the width of polysilicon line
606
in the field region between the first and second transistors. This increases the resistance of polysilicon line
606
in the field region, and can thereby degrade performance.
What is needed is a method and an apparatus for reducing incidental exposure caused by phase shifting without the resistance problems caused by extending phase shifters over polysilicon lines in field regions.
SUMMARY
One embodiment of the invention provides a system that facilitates a semiconductor fabrication process to create a line end in a manner that controls line end shortening arising from optical effects. This system operates by positioning a first mask over a photoresist layer on a surfa

Affiliated with

Also associated with

Rating

Using double exposure effects during phase shifting to... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Using double exposure effects during phase shifting to..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Using double exposure effects during phase shifting to... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3062144