Using different frequency clocks to clock counters of a driver c

Details Using different frequency clocks to clock counters of a driver c Using different frequency clocks to clock counters of a driver c

1998-08-06

2000-07-04

Martin, David

Electricity: motive power systems

Switched reluctance motor commutation control

318439, 327 79, H02K 2300

Patent

active

060843640

ABSTRACT:
A circuit and method for clocking counters in a polyphase dc motor is provided in which the motor is capable of operating at two or more operating states, spin-up and regulation. The system clock is connected to the clocking circuit through dividers to produce a first clock signal having a low frequency for operating the counter at spin-up, and a second clock signal having a higher frequency for operating the counter at regulation. The clocking circuit includes a switch for connecting the first clock signal to the clock input of the counter when the motor is at spin-up, and for connecting the second clock signal to the clock input when the motor is at regulation. The switch is controlled by a switch control circuit that ensures that switching does not occur when the counter is timing the motor by only allowing the switching to occur when the counter is at an end of a timing cycle and before the counter resets. An at-speed circuit is used to determine whether the motor is at spin-up or at regulation. A latching circuit is added to the at-speed circuit to latch its output to show that the motor is at regulation after the motor first enters regulation.

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