Using chip lamination to couple an integrated circuit with a...

Details Using chip lamination to couple an integrated circuit with a... Using chip lamination to couple an integrated circuit with a...

2006-04-18

2006-04-18

Tran, Thien F. (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Superconductive contact or lead

Transmission line or shielded

C257S664000, C257S777000

Reexamination Certificate

active

07030470

ABSTRACT:
One embodiment of the present invention provides a system that operatively couples an integrated circuit with a microstrip transmission line through chip lamination. The system includes a first semiconductor die containing the integrated circuit, and a second semiconductor die containing the microstrip transmission line. Unlike metal lines in the integrated circuit, which have relatively small cross-sections, the microstrip transmission line has a cross-section that is large enough so that signal propagation is governed by inductance and capacitance (LC) instead of resistance and capacitance (RC). The first semiconductor die and the second semiconductor die are laminated together so that the integrated circuit on the first semiconductor die is operatively coupled with the microstrip transmission line in the second semiconductor die.

REFERENCES:
patent: 5932926 (1999-08-01), Maruyama et al.
patent: 6314013 (2001-11-01), Ahn et al.

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