Using cascaded gain stages for high-gain and high-speed...

Details Using cascaded gain stages for high-gain and high-speed... Using cascaded gain stages for high-gain and high-speed...

1999-07-20

2001-05-08

Allen, Stephone B. (Department: 2878)

Radiant energy

Photocells; circuits and apparatus

Photocell controlled circuit

C348S300000

Reexamination Certificate

active

06229134

ABSTRACT:

BACKGROUND
The present specification generally relates to high-gain amplifiers and particularly to pixel sensor readout amplifiers.
Image sensors, such as active pixel sensors described in U.S. Pat. No. 5,841,126, require that the number of photons that are received be accurately counted. Accurate counting often requires small level signals to be amplified. The amplifiers in certain cases are charge amplifiers.
A charge amplifier can be conceptually thought of as an operational amplifier “op-amp” with capacitors at the input and the feedback between the output and the input. The gain is proportional to the ratio of the values of these capacitors. However, making a larger capacitor requires more area on the substrate. Therefore, a high gain device requires a very large gain area. Each double in gain requires a double in area on the substrate. It also requires a more complicated op-amp, since it requires the op-amp output to drive a larger capacitor. In addition, a single-stage high-speed application requires high power consumption.
SUMMARY
The techniques described herein address this problem using two special cascaded stages. The stages are arranged to have a multiplying effect on the resultant signal.
For example, in one embodiment, a 256× gain amplifier can be cascaded into two 16× gain amplifiers. Each of the 16× gain amplifiers requires {fraction (1/16)} the area on the chip as the 256× gain amplifier. Therefore, two of the 16× gain stages require only ⅛ or 12.5% of the area.
In one aspect, the present specification involves sampling and readout of pixel data. The sampling and readout is performed by a pixel sensor readout system. The system includes a sampling circuitry, a charge amplifier, and a readout circuitry.
The sampling circuitry sequentially samples pixel sensor data from an array of pixel sensors. The pixel sensor data represents photons integrated as electrons and collected by the pixel sensors. The charge amplifier has a cascade of gain stages. Each gain stage amplifies the pixel sensor data sampled by the sampling circuitry. The readout circuitry sequentially outputs an analog voltage corresponding to each of the amplified pixel sensor data.
Each gain stage of the charge amplifier includes an op-amp, a feedback capacitor, and an input capacitor.
The op-amp is configured to amplify a difference voltage present at a negative input of the op-amp with respect to some reference voltage at a positive input of the op-amp, and to drive the output according to the amplified difference voltage. The gain of the op-amp is determined by the ratio of the value of the feedback capacitor and the input capacitor.
In another aspect, an active pixel sensor (APS) system having an output port is disclosed. The APS system includes a pixel sensor array, a row-select element, a sampling and readout circuitry and an analog-to-digital converter (ADC) circuit.
The pixel sensor array forms an electrical representation of an image being sensed. The row-select element selects a row of pixel sensors. The sampling and readout circuitry sequentially samples sensor data from the pixel sensor array, and outputs an analog voltage corresponding to each of the pixel sensor data. The analog-to-digital converter circuit converts analog voltage outputted by the sampling and readout circuitry to digital pixel data, and transfers the digital pixel data to the output port.
In some embodiments, the APS system further includes a timing and control unit to generate signals that select appropriate pixel data for sampling and transferring the data to the output port.
In another aspect, an APS camera system for converting an array of pixel data to a visual image is disclosed. The camera system includes all the elements in the APS system and an image display device. The display device arranges the pixel data from the output port in sequential order of rows to display the visual image on the display screen.
The details of one or more embodiments are set forth in the accompanying drawings and the description below. Other embodiments and advantages will become apparent from the following description and drawings, and from the claims


REFERENCES:
patent: 5600127 (1997-02-01), Kimata
patent: 5608204 (1997-03-01), Hofflinger et al.
patent: 5841126 (1998-11-01), Fossum et al.

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