Using asynchronous FIFO control rings for synchronous systems

Details Using asynchronous FIFO control rings for synchronous systems Using asynchronous FIFO control rings for synchronous systems

1998-04-23

2000-05-30

Wambach, Margaret R.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

327153, 327161, 327295, 327297, 365219, 365221, 365233, H03K 104

Patent

active

060695145

ABSTRACT:
A system for distributing clock signals to multiple locations on a chip with minimal skew is disclosed. A series of FIFO control structures, connected in a ring by signal lines of substantially equal length, generates multiple clock signals of equal phase and frequency. The oscillation frequency of the FIFO control ring may be increased to accommodate higher-speed chips, while maintaining synchronization of clock pulses at each stage of the FIFO control ring.

REFERENCES:
patent: 5444407 (1995-08-01), Ganapathy et al.
patent: 5656963 (1997-08-01), Masleid et al.
patent: 5691662 (1997-11-01), Soboleski et al.

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