Using an MOS select gate for a phase change memory

Static information storage and retrieval – Read only systems – Semiconductive

Reexamination Certificate

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C365S063000, C365S148000, C365S225700, C257S002000, C257S020000

Reexamination Certificate

active

06912146

ABSTRACT:
An NMOS field effect transistor may be utilized to drive the memory cell of a phase change memory. As a result, the leakage current may be reduced dramatically.

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patent: 1 326 254 (2003-07-01), None
patent: WO 88/04096 (1988-06-01), None
Hwang, Y.N., Hong, J.S., Lee, S.H., Ahn, S.J., Jeong, G.T., Koh, G.H., Kim, H.J., Jeong, W.C., Lee, S.Y., Park, J.H., Ryoo, K.C., Horii, H., Ha, Y.H., Yi, J.H., Cho, W.Y., Kim, Y.T., Lee, K.H., Joo, S.H., Park, S.O., Jeong, U.I., Jeong, H.S. and Kim, Kinam, “Completely CMOS-Compatible Phase-Change Nonvolatile RAM Using NMOS Cell Transistors,” presented at 2003 19thIEEE Non-Volatile Semiconductor Memory Workshop, Monterey, California, Feb. 26-20, 2003.
Ha, Y.H., Yi, J.H., Horii, H., Park, J.H., Joo, S.H., Park, S.O., Chung, U-In and Moon, J.T., “An Edge Contact Type Cell for Phase Change RAM Featuring Very Low Power Consumption,” presented at IEEE 2003 Symposium on VLSI Technology, Kyoto, Japan, Jun. 12-14, 2003.
Hwang, Y.N., Hong, J.S., Lee, S.H., Ahn, S.J., Jeong, G.T., Koh, G.H., Oh, J.H., Kim, H.J., Jeong, W.C., Lee, S.Y., Park, J.H., Ryoo, K.C., Horii, H., Ha, Y.H., Yi, J.H., Cho, W.Y., Kim, Y.T., Lee, K.H., Joo, S.H., Park, S.O., Chung, U.I., Jeong, H.S. and Kim, Kinam, “Full Integration and Reliability Evaluation of Phase-change RAM Based on 0.24 mm-CMOS Technologies,” presented at IEEE 2003 Symposium on VLSI Technology, Kyoyo, Japan, Jun. 12-14, 2003.
Horii, H., Yi, J.H., Park, J.H., Ha, Y.H., Baek, I.G., Park, S.O., Hwang, Y.N., Lee, S.H., Kim, Y.T., Lee, K.H., Chung, U-In and Moon, J.T., “A Novel Cell Technology Using N-doped GeSbTe Films for Phase Change RAM,” presented at IEEE 2003 Symposium on VLSI Technology, Kyoto, Japan, Jun. 12-14, 2003.

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